Soft IP Design Engineer

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Responsibilities:

• The Employee should be a passionate individual with technical leadership capabilities to build Connectivity IP portfolios for Lattice FPGA.

• The Employee should have the ability to work closely with architect to translate specifications into high-speed RTL design, for the best Performance, Power and logic utilization.

• Any other duties the Employee may be instructed to carry out by the Employee's manager from time to time that are reasonably within the scope of the Employee's job position and work capabilities.

Qualifications:

• BS/MS/PhD in Electronics or Computer Engineering minimum of 2 years of FPGA IP design experience.

• Independent and self-motivated, capable of executing under dynamic environment and uncertainties.

• Experience in high speed SERDES protocols (e.g.: PCIe, Ethernet, CPRI or JESD204B/C) or Memory (DDR4,

• LPDDR4, etc.) is a plus.

• Hands-on experience in FPGA RTL design, logic verification, debug and timing closure is preferred.

• Programming skills (e.g.: C/C++, Perl, TCL or Python).

• Experience in hardware validation or hardware interoperability test is a plus.

• Experience in soft IP packaging, example design and testbench development will be an added advantage.

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry.  Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. 

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions.  Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win.  For more information about how our FPGA, CPLD and programmable power management  devices help our customers unlock their innovation, visit www.latticesemi.com.  You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.  Applications are welcome from all qualified candidates.