The Role
Seeking SOC verification interns to ensure design correctness through testing, developing test plans, and collaborating with engineers. Requires programming skills and knowledge of verification methodologies.
Summary Generated by Built In
Positions are open for Co-op/Intern SOC verification engineers from unit level to chip level as well as all aspects of verification such as functional, microarchitecture, and formal in particular in the areas of DDR memory, Ethernet, PCIe, and Fabric. We are looking for all levels of talent, from entrance to advanced level of experience.
Responsibilities
- Work closely with architecture and RTL designers on verifying the functionality correctness of the design
- Reviewing Architecture and Design Specifications
- Develop test plans and test environments
- Develop tests in assembly, C/C++, or vectors according to test plans
- Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered
- Develop checkers in SystemVerilog or C-base transactors to verify the design
- Write assertions and apply formal verification to the designImplementing test benches, generating directed/constrained random tests
- Debugging failures, running simulations, tracking bugs
- Handling schedules and supporting multi-functional engineering effortAssisting in verification flows, automation scripts and regressions
Requirements
- In-depth knowledge of digital logic design, CPU/SOC architecture and microarchitecture.
- Sophisticated knowledge of SystemVerilog.
- Experienced level knowledge C/C++.Relevant knowledge of verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection.
- Basic knowledge of formal verification methodology is a plus.
- Excellent knowledge of one of the scripting languages such as Python, TCL is a plus.
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
Education and Experience
- PhD, Master’s Degree or Bachelor’s Degree in technical subject area.
Top Skills
C/C++
Python
Systemverilog
Tcl
Am I A Good Fit?
Get Personalized Job Insights.
Our AI-powered fit analysis compares your resume with a job listing so you know if your skills & experience align.
Success! Refresh the page to see how your skills align with this role.
The Company
What We Do
Rivos, a high performance RISC-V System Startup targeting integrated system solutions for Enterprise
