Silicon Formal Verification - Intern

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2 Locations
In-Office
Software
The Role
Positions are open for full-time and co-op/internship roles in the areas of formal verification of CPU, Fabric, and Accelerator design.

Responsibilities

  • As a Formal Verification Intern, you will be involved in the formal verification of the architecture and microarchitecture of a high-performance RISC-V core, a coherent fabric, and an accelerator design. In this position, you will:
  • Prove functional and security properties of the design, find design bugs
  • Develop reusable and scalable proof techniques.

Requirements

  • Experience with model checking/interactive theorem provers
  • Coursework or experience in formal methods 
  • Knowledge of declarative programming language

Education and Experience

PhD, Master’s Degree, or Bachelor’s Degree in a technical subject area.

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The Company
HQ: Mountain View, CA
287 Employees
Year Founded: 2021

What We Do

Rivos, a high performance RISC-V System Startup targeting integrated system solutions for Enterprise

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