Silicon ATE Test Engineer

Reposted 6 Days Ago
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Hsinchu County
Hybrid
10-12
Expert/Leader
Software
The Role
The role involves developing test programs for various device types on ATE, conducting test hardware bring-up, and collaborating for optimal debugging and test strategies.
Summary Generated by Built In
As a Sr. ATE test engineer, this role will be responsible for test, characterization and HVM shipment of our Silicon.

Responsibilities

  • Develop production, qualification, and characterization test programs for digital, analog, mixed-signal devices on ATE (Automatic Test Equipment) using Advantest 93K, Teradyne Uflex or other major test platforms.
  • In charge of test pattern conversion and verification prior to silicon to ensure “First Time Right Vector” for smooth ATE bring-up.
  • In charge of test hardware bring-up (probe card and load board) to meet the test specifications.
  • Own First-Si test pattern bring-up, and collaborate with Product Engineering, DfT, and IC design to efficiently debug any failures and implement optimal solutions.
  • Define test requirements & test limits, ensuring the correct levels of test coverage, and devise strategies to optimize test time.
  • Drive ATE to System level correlation to implement relevant voltage guard-bands.
  • Work cross functionally on failure analysis and debug during NPI phase and feedback to test strategy to ensure high quality standards

Requirements

  • Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
  • Minimum of 10-12 years of ATE experience developing test programs for server, client/mobile, or HPC products.
  • Strong understanding of hardware design requirements (CPM/IBIS models, SI/PI simulation) for probe-card, load-board, burn-in boards.
  • Hands-on experience with ATE test equipment (Advantest SMT8 preferred) writing Scan / Mbist / PHY tests, developing product binning test methods, secure manufacturing flows.
  • Experience in leading a team of test engineers and managing OSATs highly desired.
  • Prior DfT experience is highly desired.

Education and Experience

  • Bachelor’s or Master’s Degree in technical subject area.

Top Skills

Advantest 93K
Ate
Cpm
Ibis
Pi Simulation
Si Simulation
Teradyne Uflex
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The Company
HQ: Mountain View, CA
287 Employees
Year Founded: 2021

What We Do

Rivos, a high performance RISC-V System Startup targeting integrated system solutions for Enterprise

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