Signal and Power Integrity Lead Application Engineer

Posted Yesterday
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3 Locations
In-Office
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Customer-facing technical lead performing SI and PI analysis for IC packages and PCBs using Sigrity and Clarity 3D. Tasks include PDN/IR drop optimization, time/frequency domain simulations, IBIS/IBIS-AMI testbench design, EM extraction, protocol sign-off (DDR5/LPDDR5/PCIe5), customer training, presentations, and on-site customer support across France.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. 

 

Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. 

 

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 

 

Job Title: Signal and Power Integrity Lead Application Engineer 

 

Location: Vélizy, Sophia or Grenoble, France 

 

Reports to: Sr Principal Application Engineer 

 

 

Job Overview: 

This is a high-impact, customer-facing role within Cadence’s Application Engineering organisation, where you will serve as a technical expert in Signal Integrity (SI) and Power Integrity (PI) — working directly with some of the world’s most innovative technology companies.  

 

You will guide customers through complex SI/PI design challenges on IC packages and PCBs, leveraging Cadence’s industry-leading Sigrity and Clarity 3D toolsets across next-generation interconnect technologies including DDR5, LPDDR5, and PCIe 5.  

 

Based at one of our three French offices - Vélizy, Sophia, or Grenoble - you will join a collaborative international team spanning the US, Europe, and Asia-Pacific, with outstanding opportunities to deepen your technical expertise and make a tangible impact on customer success. 

 

Job Responsibilities: 

  • Perform Signal Integrity (SI) and Power Integrity (PI) analysis in both time and frequency domains to support customer design validation and sign-off 

  • Apply SI/PI methodologies including IBIS, TDR, impedance control, transmission line theory, and Power Distribution Network (PDN) characterisation across IC package and PCB designs 

  • Conduct IR drop and AC-level PDN optimisation to meet target impedance and power ripple requirements on customer use cases 

  • Design and configure system-level, time-domain test benches incorporating IBIS-AMI models and interconnect structures for high-speed protocol sign-off (LPDDR5, UCIe, CEI-OIF, and others) 

  • Collaborate with customers to analyse IC packages and PCBs using the latest interconnect technologies, including DDR5/LPDDR5 and PCIe 5 

  • Drive technical campaigns and software evaluations with customers, delivering clear and compelling technical presentations to varied audiences 

  • Train and onboard new customers on Sigrity SI/PI analysis workflows and Clarity 3D full-wave electromagnetic (EM) extraction 

  • Partner with internal sales, product engineering, and R&D teams to develop and deliver tailored, customer-focused technical solutions 

  • Build trusted relationships with customers across France, spending time on-site to understand and address their specific design challenges 

  • Contribute to the global Application Engineering community by sharing technical insights and best practices with international colleagues 

 

 

Job Qualifications: 

  • Master’s degree in Electrical Engineering, Electronics Engineering, or equivalent professional experience 

  • 3–6 years of experience in Signal Integrity, Power Integrity, or a closely related electromagnetic design role 

  • Solid background in EDA tools with applied knowledge of IC package and PCB design methodologies 

  • Proficiency in SI/PI simulation workflows, including PDN analysis, high-speed protocol characterisation, and 2.5D/3D EM model extraction 

  • Fluency in French and English (both written and spoken) - direct customer engagement in French is essential, with internal collaboration conducted in English 

  • Valid work and residence permit in France 

 

Additional Skills/Preferences: 

  • Hands-on experience with Cadence Sigrity tools and/or the Clarity 3D electromagnetic solver 

  • Familiarity with thermal analysis methodologies alongside SI/PI workflows 

  • Experience presenting technical content to both technical and non-technical audiences in a customer-facing or pre-sales environment 

  • Exposure to emerging high-speed interconnect standards such as UCIe or CEI-OIF 

 

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.  

 

Travel: Regular local travel within France to visit customers on-site (~20–30% of working time). 

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Master's degree in Electrical or Electronics Engineering or equivalent experience
  • 3-6 years' experience in Signal Integrity, Power Integrity, or related electromagnetic design
  • Solid background in EDA tools and IC package and PCB design methodologies
  • Proficiency in SI/PI simulation workflows including PDN analysis and 2.5D/3D EM model extraction
  • Fluency in French and English (written and spoken)
  • Valid work and residence permit in France
  • Hands-on experience with Cadence Sigrity and/or Clarity 3D
  • Familiarity with thermal analysis methodologies alongside SI/PI workflows
  • Experience presenting technical content to technical and non-technical audiences in customer-facing or pre-sales contexts
  • Exposure to emerging high-speed interconnect standards such as UCIe or CEI-OIF

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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