Core Responsibilities
Owns the process development and technical support of the Flip Chip process for silicon photonic chip wafers, with OSAT or internal line. Process may include plasma cleaning, flux engineering, pick & place, reflow, underfill, curing and/or TCB/NCP flux-less flow.
DOE to characterize process window and margin. Optimize process integration with upstream processes (e.g. bump/FO) to increase yield and manufacturability.
Material Characterization & Selection: Evaluate and qualify new manufacturing raw materials, including NCP, flux, underfill etc, as applicable.
Design and execute DOE plans to characterize thermal and mechanical stress. Lead reliability validations including Temperature Cycling Test (TCT), Unbiased Highly Accelerated Stress Test (HAST) and High-Temperature Storage (HTS).
Failure Analysis & Debug: Own the root-cause diagnostics of structural failure modes unique to FC (e.g. flux void, residue, misalignment, die warpage, reflow anomaly, underfill void etc), and formulate improvement solutions.
Manage incoming material quality control, establish SPC control plans and monitor process variation to ensure long-term process stability.
Compile process SOP, WI, process failure reports and engineering change documents; support NPI new product introduction and process verification.
Key Requirements & Qualifications
Education: Bachelor or Master degree in Materials Science, Chemical Engineering, Mechanical Engineering, Microelectronics, or an equivalent technical discipline.
Experience: 5+ years of hands-on industry experience in flip chip assembly.
Technical Knowledge:
Deep practical understanding of plasma cleaning, flux engineering, pick & place, reflow, underfill, curing and/or TCB/NCP flux-less flow.
Comprehensive command of finite element simulation principles regarding warpage, thermal dissipation, and structural mechanical integrity.
Solid working expertise with industry validation methodologies including FMEA, SPC controls, and structured 8D problem-solving tools.
Software Tools: High proficiency with robust analytical platforms like JMP, Minitab.
Skills Required
- Bachelor's or Master's degree in Materials Science, Chemical Engineering, Mechanical Engineering, Microelectronics, or equivalent technical discipline.
- 5+ years hands-on industry experience in flip chip assembly.
- Deep practical experience with plasma cleaning, flux engineering, pick & place, reflow, underfill, curing, and TCB/NCP flux-less flow.
- Proven ability to design and execute DOE to characterize process windows and thermal/mechanical stress.
- Experience leading reliability validations including TCT, HAST, and High-Temperature Storage (HTS).
- Expertise in failure analysis and root-cause debugging for flip chip-specific failure modes (voids, warpage, misalignment, reflow anomalies).
- Comprehensive command of finite element simulation principles for warpage, thermal dissipation, and structural integrity.
- Working knowledge of industry validation methodologies: FMEA, SPC controls, and structured 8D problem-solving.
- High proficiency with analytical software such as JMP and Minitab.
- Experience managing incoming material quality, establishing SPC control plans, and compiling SOPs, WIs, and engineering change documents.
What We Do
Lumilens addresses the red hot market for AI data center infrastructure by designing, manufacturing and selling photonic interconnect solutions. We design and use custom robotics + AI in our factories to more efficiently build our products. Lumilens is backed by top-tier venture capital investors including Mayfield and Spark Capital.
