Senior Staff Engineer I - RTL Design

Posted 10 Days Ago
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Bangalore, Bengaluru, Karnataka
Senior level
Semiconductor
The Role
As a Senior Staff Engineer I - RTL Design, you will deliver standards-compliant IP blocks, lead ASIC or FPGA projects, refine ASIC development processes, and perform RTL coding in Verilog. You will work closely with verification and back-end teams, mentor junior engineers, and ensure quality designs by tracking bugs and constraints.
Summary Generated by Built In

The Opportunity


We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You'll Do

  • Deliver standards-compliant IP blocks for use in UCIe / PCIe / CXL / HBM.
  • Lead ASIC or FPGA projects.
  • Refine ASIC development process with advancing tools/scripting.
  • Creating micro-architecture and detailed design documents for design keeping in mind performance, power, area requirements.
  • Perform RTL coding for complex design blocks in Verilog.
  • Function/performance simulation check and debug.
  • Understanding on Lint/CDC/Synthesis checks, power analysis and LEC check.
  • Understanding and defining constraints.
  • Issue and track bug reports from beginning to closure.
  • Work with the team to deliver quality designs.
  • Work very closely with verification and back-end team.
  • Mentor junior engineers.

What You'll Need

  • B.E/M. Tech with 10+ years of experience in ASIC or FPGA development.
  • Protocol knowledge (UCIe, PCIe, CXL, HBM, AMBA SoC bus Protocols).
  • Solid experience with Verilog and System Verilog.
  • Experience with Lint, CDC, Synthesis, Power analysis, and LEC tools.
  • Experience with simulation tools.
  • Experience in ASIC tape outs is plus.
  • Experience in UCIe / PCIe / CXL.
  • Experience with PERL, TCL, and Python programming.

"Hybrid work environment"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Hybrid Working Model
  • Provisions to pursue advanced education from Premium Institute, eLearning content providers
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility

    Diversity & Inclusivity

    Alphawave Semi is based out of one of the most diverse countries in the world. This includes differences related to race, ethnicity, national origin, gender, gender expression and presentation, sexual orientation, religion, age, ability and socioeconomic status. To us, diversity is one our strongest assets to our organization. We commit ourselves to promoting the recognition and appreciation of our diverse and rich culture. We believe that it is critical to our success to promote freedom of thought and opinion in a respectful environment. The decisions we make are rooted by respectfully considering each other’s thoughts and opinions and by working towards a greater common goal.

    Accommodation

    Alphawave Semi is an equal opportunity employer and welcomes applications from all qualified individuals, including visible minorities, Indigenous People, and persons with disabilities. We welcome and encourage applications from people with disabilities. If as a qualified job applicant, you request accommodation, Alphawave Semi will consult with you to provide reasonable accommodations according to your specific needs. If you wish to make a request, you will be provided an opportunity if you’re applications is selected to proceed in our hiring process.

    Top Skills

    Perl
    Python
    System Verilog
    Tcl
    Verilog
    The Company
    London
    636 Employees
    On-site Workplace
    Year Founded: 2017

    What We Do

    We work to create silicon that enables the highest performing, most reliability and lowest power digital communication networks.

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