Senior Staff Engineer, Digital IC Design

Reposted 21 Hours Ago
Be an Early Applicant
Hồ Chí Minh, VNM
In-Office
Senior level
Artificial Intelligence • Automotive • Semiconductor
We create custom semiconductor solutions that move, process, store, and secure data quickly and reliably.
The Role
Design, verify, and evaluate digital circuits for high-speed communication ASICs. Develop ASIC specs and micro-architecture, design RTL for PHY transceivers, perform verification, synthesis, timing/PPA analysis, and support post-silicon debug and chip bring-up.
Summary Generated by Built In

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Connectivity BU develops industry leading PAM4 optical digital signal processors (DSPs) power the optical interconnects inside the world’s cloud and AI data centers, and support both Ethernet and InfiniBand architectures. With increasing demands for training, inference and cloud computing, operators must quickly scale out their networks with reliable, low-latency, high-bandwidth connectivity. Marvell PAM4 DSPs deliver the performance and versatility needed to support AI and cloud frontend and backend networks at 1.6T, 800G, 400G, 200G and 100G

What You Can Expect

  • As ASIC design engineer you will be responsible for the design, verification, and evaluation of digital circuits in high-speed data communication ICs.
  • Develop ASIC specification and micro-architecture of signal processing and communications algorithms.
  • Analyze DSP challenges and opportunities, explore and compare different optimization directions, and generate trade-off curves for performance and cost (complexity/power/area/design time)
  • Work on high-efficiency DSP design
  • Design RTL for various PHY transceivers with data rates from 25Gbps to 224Gbps for diverse applications.
  • Collaborate with Analog, Digital Verification, Firmware, and Application
  • Engineering teams to deliver competitive PHY transceiver solutions across all product lines.
  • Participate in various aspects of chip design RTL development, functional verification, RTL lint, cross clock domain (CDC) analysis, synthesis, formal equivalence, static timing analysis and PPA analysis.
  • Post-silicon debug and correlation

What We're Looking For

  • Strong experience in high speed DSP/FEC (Forward Error Correction) 
  • Hands on experience with matching DSP block model functionality to RTL's, synthesis, static timing analysis and functional verification 
  • Strong system level modeling, debugging and troubleshooting
  • Strong language user in Matlab, Verilog, System Verilog, Perl, Unix Shell. 
  • Experience of entire design cycle from micro-architecture specification definition, verilog coding, synthesis and timing closure to post-silicon debug and support in lab environment. 
  • Experience in both RTL development (block and subsystem level) and gate level verification and debug. 
  • Understanding of Design-for-Test (DFT) concepts, including Scan and BIST 
  • Experience with chip bring up and functional validation of the product in the lab 
  • Ability to multi-task and must be flexible and adaptable to a rapidly changing and demanding environment 
  • Strong communication skills and effective team collaboration abilities 
  • Bachelor’s degree in Computer Engineering, Electrical Engineering, or related fields with 5+ years of relevant experience, or a Master’s/PhD with 2+ years of relevant experience.
     

Additional Compensation and Benefit Elements

  • Competitive salary, plus 13th-month salary and performance-based bonus

  • RSUs (Restricted Stock Units) for new joiners and on-going annually

  • Premium health & accident insurance for you and your family (spouse and children)

  • Annual medical check-up at a designated hospital arranged by Marvell

  • Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays

  • Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-UN1

Skills Required

  • Strong experience in high speed DSP and FEC (Forward Error Correction).
  • Hands-on experience matching DSP block models to RTL, synthesis, static timing analysis, and functional verification.
  • Strong system-level modeling, debugging, and troubleshooting skills.
  • Proficiency in Matlab, Verilog, SystemVerilog, Perl, and Unix Shell.
  • Experience across full design cycle: micro-architecture spec, Verilog coding, synthesis, timing closure, and post-silicon debug.
  • Experience in RTL development (block and subsystem) and gate-level verification and debug.
  • Understanding of DFT concepts including Scan and BIST.
  • Experience with chip bring-up and functional validation in lab environments.
  • Ability to multi-task, adapt to a rapidly changing environment, and strong communication/team collaboration skills.
  • Bachelor's in Computer/Electrical Engineering (5+ years experience) or Master's/PhD (2+ years experience).

Marvell Technology Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Marvell Technology and has not been reviewed or approved by Marvell Technology.

  • Equity Value & Accessibility Equity appears to be a meaningful part of total rewards through RSUs and an ESPP with a 15% discount and lookback, which can materially raise overall compensation. Stock upside is positioned as a key differentiator when company performance is strong.
  • Parental & Family Support Paid parental/bonding leave is described as substantial, with additional disability leave for birthing parents and a flexible return-to-work program. Family-care leave, generous bereavement provisions, and family-building support (e.g., adoption/surrogacy reimbursement) further strengthen the package.
  • Healthcare Strength Medical coverage is presented as broad with multiple plan options and preventive care covered at 100% in-network, alongside dental, vision, and structured mental-health support. Additional programs like telehealth and specialized care partners add depth to the health offering.

Marvell Technology Insights

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The Company
HQ: Santa Clara, CA
6,500 Employees
Year Founded: 1995

What We Do

Marvell specializes in semiconductor solutions that power a wide range of industries, from data centers and 5G networks to AI, automotive, and storage applications. Our cutting-edge products are designed to meet the constantly evolving demands of a connected world, enabling faster, more efficient and more secure data processing and communication. With a focus on excellence and a commitment to advancing technology, we develop solutions that drive progress and transform industries.

Why Work With Us

Life at Marvell means being a part of new innovation and enduring technology; but it's also much more. Our diverse community is strengthened through cultural events, corporate gatherings and team-building activities, fostering collaboration and making work enjoyable. At Marvell, it's not just a job; it's an enriching, community-driven experience.

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