Senior Staff DFT MBIST Engineer

Reposted 14 Days Ago
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Bengaluru, Bengaluru Urban, Karnataka, IND
In-Office
7-7 Annually
Senior level
Artificial Intelligence • Information Technology • Consulting
Talent Solutions for the AI Era
The Role
The Senior Staff DFT Engineer will architect and implement DFT/DFX solutions for AI accelerator SoCs, ensuring manufacturability and silicon debug, while collaborating across teams.
Summary Generated by Built In

Role Overview

We are seeking a Senior Staff DFT Engineer to join a rapidly growing DFT design team focused on next-generation AI accelerator SoCs. In this role, you will define, architect, and implement current and future DFT/DFX solutions, supporting advanced SoC designs that leverage innovative memory-centric compute and heterogeneous chiplet architectures.

This is a highly hands-on role requiring both deep technical execution and high-level planning, working across design, verification, product, and test teams to ensure robust manufacturability and silicon bring-up.

 

Location:

Hybrid, working onsite at our Bengaluru, Karnataka, headquarters 3-5 days per week.

 

Key Responsibilities
  • Drive DFT partitioning strategies for ATPG, including hierarchical and scalable approaches.

  • Implement ATPG compression and serialization, and perform RTL scan insertion with associated design rule fixes.

  • Own Memory BIST (MBIST) solutions, including memory repair and in-system test (IST), from implementation through verification and silicon debug.

  • Support boundary scan and define DFT mode constraints for IPs, providing timing feedback to STA teams.

  • Generate and integrate DFT RTL, ensuring quality through RTL-level checks (e.g., linting and DFT rule verification).

  • Apply and support IEEE 1149.1, IEEE 1500, and IEEE 1687 standards.

  • Execute and verify ATPG (SAF, TDF) and MBIST using unit-delay and min/max timing simulations.

  • Perform detailed ATPG coverage analysis and drive coverage closure.

  • Collaborate with product and test engineering teams to deliver manufacturing test patterns for ATE.

  • Develop diagnostic tools and flows for ATPG, MBIST, and silicon bring-up on ATE.

  • Work hands-on with industry-standard DFT tools, contributing from low-level implementation through architectural planning.

Minimum Qualifications
  • BE/ME (or equivalent) in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

  • 7+ years of experience in DFT, including scan test and MBIST.

  • Proficiency with HDLs such as Verilog, SystemVerilog, or VHDL.

  • Experience with scripting or programming languages (e.g., Python, Perl, TCL, C).

  • Strong ability to collaborate effectively in cross-functional and diverse teams.

  • Experience producing clear, detailed technical documentation.


Top Skills

AI
Atpg
C
Dft
Dfx
Mbist
Perl
Python
Rtl
Socs
Systemverilog
Tcl
Verilog
Vhdl
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The Company
HQ: Livermore, CA
9 Employees
Year Founded: 2025

What We Do

We provide Talent Solutions for the AI Era. Our mission is to connect businesses with exceptional talent and consulting solutions that align with your company’s culture and values. We offer AI consulting services to enable businesses in leveraging cutting-edge artificial intelligence. We help discover, design and deploy AI solutions that streamline operations, boost productivity, and unlock new growth opportunities. Our team of AI experts, strategists, and technology specialists work closely with organizations to integrate AI-driven solutions that align with their unique goals and challenges. From automation and data analytics to predictive modeling and AI-based customer experiences, we provide end-to-end support for businesses embarking on their AI transformation journey.

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