Senior Staff Design Engineer, Analog IC Design

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As an Analog IC Design Senior Staff Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking.
In this role, you’ll be a key member of the Automotive and Copper Ethernet PHY team, working on the development of next-generation analog and mixed-signal designs for Automotive and Enterprise Networking products.

What You Can Expect

• Design analog building blocks for power efficient multi-gigabit Automotive/Ethernet PHY AFE
• Define specifications based on link budget, behavioral model and transistor-level feasibility
• Build schematic design to meet required specification and execute on verification with automotive rigor
• Drive mask design with layout designer for implementation

What We're Looking For

Master’s degree in Electrical Engineering with 6+ years of experiences or PhD in Electrical Engineering with 3+ years of experience.

• Solid understanding and experience of designing analog mixed-signal circuit blocks, such as PLL, phase interpolator, low jitter clock distribution, bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs, line driver, filters, etc.
• The ideal candidate will have a deep understanding of analog mixed-signal design with experience in high-speed transceivers.
• In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
• Design experience in advanced CMOS technologies, design with FINFET technology
• Experience with high-speed high-linearity TX line-driver for full-duplex operation
• Experience with high-linearity RX design and its building blocks like hybrid network, PGA and filter, etc.
• Experience with high-speed high-resolution ADC design and techniques like time-interleaving, SAR, comparators, etc.
• Familiarity with CDR architectures and implementations
 

Expected Base Pay Range (USD)

129,600 - 191,810, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

#LI-TD1