Senior Process Integration Engineer

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• Responsible for development of new process flow and integrations to optimize and assist in logic device manufacturing of TEL internal test samples
• Support customers in solving their integrated and process issues through current and future capabilities of TEL equipment.
• Work seamlessly with all of TEL factories and onsite BU(s) to incorporate their product roadmap and capabilities with customers current and future needs through standard and novel integration flows.
• Design experiments, execute and demonstrate proposed solutions on TEL internal vehicle including analysis and statistical analysis.
• Coordinate with each BU to conform to overall TEL business goals.
• Lot management including process split, DOEs, metrology setup and data analysis/evaluation
• Maintain and execute a high degree of quality control techniques to ensure excellence
• Strong data analysis, record keeping and organizational skills required

• Lot management skills using SIVIEW MM/SM.
• Measurement and analysis tool operation skills are required including inline CDSEM and cross-sectional SEM.
• EUV Lithography and or immersion 193i experience would be preferred.
• Work self-management, teamwork and collaboration skills are required.
• Experience in project management, planning and scheduling is desirable.
• Individual must have excellent verbal and written communication skills including presentations.
• Knowledge of experiment design (DOE) and techniques for tool and process optimization is required.
• Strong Problem-solving skills required.
• In-depth knowledge and skill for personal computer including peripheral equipment and software are required (MS Windows, MS Office, network, etc.)
• Strong data analysis skills are needed. Experience with Quartz PCI measurement software, Excel, JMP or other statistical software is preferred.

• Master’s degree required in related science/engineering field, preferably Chemical Engineering, Materials Science/Engineering, Mechanical Engineering, Electrical Engineering, Chemistry, or Physics with minimum 5 years of related work experience in semiconductor industry engineering or PhD with minimum 3 years’ experience.
• Semiconductor unit process experience in the area of litho processing recipe set up (scanner and track) and mask installation is desirable, other unit process experience in etch/ films/CMP also beneficial.
• Semiconductor integration experience is preferred.
• U.S. work authorization is required.

Individual pay is determined based on multiple factors, including but not limited to location, experience, skills, job-related knowledge, relevant education, certifications, and/or training.  In addition to base salary, we offer (full time regular employees ) a comprehensive benefits package and for certain roles eligibility in our bonus plan and long-term incentives as applicable.  The talent advisor can share more details about total compensation for the role in your location during the hiring process.

Diversity creates an innovative culture. TEL US is an Equal Employment Opportunity / Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, national origin, protected veteran status, disability status, sexual orientation, gender identity or expression, marital status, genetic information, or any other characteristic protected by law.