The demand for new datacenters and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck isn’t about bigger chips or more of them; it means rethinking the fundamental architecture. The industry's current path isn’t going to meet the need, so we took a different approach.
Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.
We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others. We have also been recognized on the EE Times Silicon 100 list for several consecutive years.
Join us and shape the future of computing!
Position Overview:
We are seeking an accomplished technical leader to serve as Senior Principal Architect for our cutting-edge System-on-Chip programs. This senior-level position requires deep hands-on technical expertise in SOC and CPU architecture specification development combined with extensive performance, power, and area analysis. The ideal candidate will define architectural direction for complex, large-scale SOCs and drive rigorous PPA trade-off studies to deliver optimal silicon solutions.
Location: Austin, TX or San Mateo, CA. Full-time onsite position.
Key Responsibilities:
Drive SOC architecture definition including subsystem partitioning, memory hierarchy, interconnect topology, and IP integration strategy
Drive CPU architecture specification encompassing microarchitecture, pipeline design, cache hierarchy, and instruction set extensions
Partner with modeling teams on performance analysis using cycle-accurate simulators, trace-driven models, and analytical frameworks
Drive power architecture decisions including voltage/frequency domains, power gating strategies, and dynamic power management
Drive area analysis and optimization, balancing performance and power targets against die cost constraints
Collaborate in trade-off studies across the performance/power/area design space to guide architectural choices
Work closely with RTL design, physical design, and analog teams to ensure architectural intent is realized in implementation
Drive architectural specifications and documentation
Represent architecture in program reviews and drive alignment with product requirements
Qualifications:
MS or PhD in Electrical Engineering, Computer Engineering, or Computer Science
15+ years of experience in SOC/CPU architecture with at least 5 years in a principal or staff-level role
Expert knowledge of CPU microarchitecture including out-of-order execution, branch prediction, memory subsystems, and coherency protocols
Strong background and experience in performance modeling methodologies and tools
Deep understanding of power estimation techniques at architectural and RTL levels
Experience with modern SOC building blocks including high-speed interconnects, memory controllers, and accelerator architectures
Track record of successful tape-outs on advanced process nodes
Excellent communication skills with ability to influence across organizational boundaries
Excellent problem-solving skills and attention to detail
Preferred Skills:
Experience with RISC-V or ARM architecture development
Familiarity with machine learning accelerator architectures
Background in silicon bring-up and performance correlation
Understanding of advanced packaging technologies
Experience with system-level power management frameworks
This is an opportunity to play a pivotal role in an innovative startup redefining the future of AI hardware. Work on a game-changing technology at the intersection of photonics and AI as part of a collaborative and brilliant team. You’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Come help us bring this transformative technology to the world.
BenefitsJoin a team that invests in your future and your well-being. At Neurophos, we offer:
100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
Unlimited PTO. No rigid vacation banks, just a focus on delivery.
401(k) matching and stock option opportunities to ensure our success is your success.
Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
Personalized Benefits. Choose the plans that fit your life and take the cash back for those that don’t.
Top Skills
What We Do
Neurophos is delivering the computational power of the human brain to artificial intelligence. By leveraging decades of metamaterials research and >300 patents, we are unlocking the speed and efficiency of optical compute in an in-memory processor to increase the speed and energy efficiency of AI inference by more than 100X.
