Senior Package Reliability Engineer

Posted 7 Days Ago
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San Jose, CA, USA
In-Office
167K-240K Annually
Senior level
Artificial Intelligence • Internet of Things • Machine Learning
The Role
Lead thermal and thermomechanical characterization and qualification of advanced 2.5D/3D semiconductor packages. Develop and calibrate FEA models, define and run warpage/coplanarity/reliability tests, perform lifetime prediction and failure analysis, own DFMEA activities, and produce customer reports on package reliability.
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Job Details:

Job Description:

About Altera

At Altera™, our independence as the world’s largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industryleading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

We are seeking an experienced semiconductor Package Reliability Engineer responsible for characterizing and qualifying advanced 2.5D/3D semiconductor packages.  This role requires partnering with package development engineers and semiconductor package assembly and manufacturing teams for selection of packaging materials based on thermal and thermomechanical characterization for advanced packaging technologies.

Key Responsibilities

  • Partner with package development and assembly teams for packaging materials (substrate, and assembly materials) selection to meet product thermomechanical reliability requirements

  • Develop and maintain advanced semiconductor package thermal and thermomechanical finite element models using commercial software (e.g., Ansys, Abaqus)

  • Define, execute and interpret package coplanarity, warpage, and second level reliability data collection strategies to calibrate the thermal and thermomechanical FEM models

  • Lead package reliability evaluations to validate package robustness as defined by industry standards such as JEDEC, MIL-STD, IPC, and AEC using test-chips and products

  • Understand FPGA use conditions and develop customer reports, communications related to package thermal and thermomechanical concerns.

  • Perform reliability lifetime prediction modeling from stress test/field data

  • Develop and own package DFMEA/FMEA’s partnering with development and manufacturing teams

Salary Range

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance. 

$166,900 - $240,000 USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.

#LI-MD1

Qualifications:

Minimum Qualifications

  • Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or a related technical field with 8+ years of experience in semiconductor package thermal and thermomechanical analysis

  • 8+ years of experience using thermal and thermomechanical simulation tools (e.g., Ansys, Abaqus, COMSOL, or equivalent) to develop and analyze warpage, coplanarity, stress, and deformation models for advanced semiconductor packages.

  • 8+ years of experience developing, analyzing, and validating advanced semiconductor packaging technologies, including 2.5D, 3D, and heterogeneous integration packages, with a strong understanding of package reliability.

  • 3+ years of experience applying reliability statistics, failure analysis methodologies, and lifetime modeling techniques to semiconductor packaging and product reliability assessments.

  • 3+ years of experience developing scripts or software using Python for automation, simulation workflows, data analysis, and post-processing.

Preferred Qualifications

  • Deep understanding of thermal, mechanical and thermomechanical characteristics of advanced 2.5D/3D flip-chip packages

  • Ability to correlate between thermomechanical simulations and package dynamic warpage and package behavior in surface mount system level assembly

  • Develop customer facing collaterals for packaging risk assessments  

Job Type: Regular

Shift:Shift 1 (United States of America)

Primary Location:San Jose, California, United States

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Skills Required

  • Master's degree in Mechanical Engineering, Materials Science, Packaging Engineering, or related field with 8+ years of semiconductor package thermal and thermomechanical analysis experience
  • 8+ years experience using thermal and thermomechanical simulation tools (e.g., Ansys, Abaqus, COMSOL, or equivalent) for warpage, coplanarity, stress, and deformation modeling
  • 8+ years developing, analyzing, and validating advanced semiconductor packaging technologies including 2.5D, 3D, and heterogeneous integration
  • 3+ years applying reliability statistics, failure analysis methodologies, and lifetime modeling techniques to semiconductor packaging and product reliability
  • 3+ years developing scripts or software using Python for automation, simulation workflows, data analysis, and post-processing
  • Deep understanding of thermal, mechanical and thermomechanical characteristics of advanced 2.5D/3D flip-chip packages
  • Ability to correlate thermomechanical simulations with dynamic warpage and package behavior in surface mount system level assembly
  • Experience developing customer-facing collateral for packaging risk assessments

Altera (altera.com) Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Altera (altera.com) and has not been reviewed or approved by Altera (altera.com).

  • Retirement Support Feedback suggests retirement programs are robust, with offerings such as a 401(k) and a pension. This breadth supports long-term financial security.
  • Leave & Time Off Breadth Feedback suggests time-off policies are generous, including PTO, paid sick days, and paid holidays. Wellness initiatives like gym memberships further support balance.
  • Parental & Family Support Feedback suggests parental leave is generous. Family-building support, including fertility benefits and adoption reimbursement, is highlighted as part of the package.

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The Company
HQ: San Jose, California
1,612 Employees
Year Founded: 1983

What We Do

Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.

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