Senior Machine Learning Applications and Compiler Engineer, LPX

Posted 3 Days Ago
Be an Early Applicant
2 Locations
Remote or Hybrid
135K-220K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
The Role
Develop high-performance machine learning inference runtimes and compiler components for NVIDIA platforms. Optimize neural network graph mappings through compiler transformations, scheduling, memory layouts, profiling, and benchmarking. Collaborate with hardware architects on codesign, evaluate spatial accelerator techniques, and contribute to NVIDIA’s software ecosystem. The role also involves research, technical publications, and presentations on compilation and inference optimization.
Summary Generated by Built In

We are now looking for a Senior Machine Learning Applications and Compiler Engineer!

 

NVIDIA is seeking engineers to develop algorithms and optimizations for our LPX inference and compiler stack. You will work at the intersection of large-scale systems, compilers, and deep learning, crafting how neural network workloads map onto future NVIDIA platforms. This is your chance to be part of something outstandingly innovative!

 

What you’ll be doing:

  • Build, develop, and maintain high-performance runtime and compiler components, focusing on end-to-end inference optimization.

  • Define and implement mappings of large-scale inference workloads onto NVIDIA’s systems.

  • Extend and integrate with NVIDIA’s SW ecosystem, contributing to libraries, tooling, and interfaces that enable seamless deployment of models across platforms.

  • Benchmark, profile, and monitor key performance and efficiency metrics to ensure the compiler generates efficient mappings of neural network graphs to our inference hardware.

  • Collaborate closely with hardware architects and design teams to feedback software observations, influence future architectures, and codesign features that unlock new performance and efficiency points.

  • Prototype and evaluate new compilation and runtime techniques, including graph transformations, scheduling strategies, and memory/layout optimizations tailored to spatial processors.

  • Publish and present technical work on novel compilation approaches for inference and related spatial accelerators at top tier ML, compiler, and computer architecture venues.

 

What we need to see:

  • MS or PhD in Computer Science, Electrical/Computer Engineering, or related field, or equivalent experience, with 5 years of relevant experience.

  • Strong software engineering background with proficiency in systems level programming (e.g., C/C++ and/or Rust) and solid CS fundamentals in data structures, algorithms, and concurrency.

  • Hands on experience with compiler or runtime development, including IR design, optimization passes, or code generation.

  • Experience with LLVM and/or MLIR, including building custom passes, dialects, or integrations.

  • Familiarity with deep learning frameworks such as TensorFlow and PyTorch, and experience working with portable graph formats such as ONNX.

  • Solid understanding of parallel and heterogeneous compute architectures, such as GPUs, spatial accelerators, or other domain specific processors.

  • Strong analytical and debugging skills, with experience using profiling, tracing, and benchmarking tools to drive performance improvements.

  • Excellent communication and collaboration skills, with the ability to work across hardware, systems, and software teams.

  • Ideal candidates will have direct experience with MLIR based compilers or other multilevel IR stacks, especially in the context of graph based deep learning workloads.

 

Ways to stand out from the crowd:

  • Prior work on spatial or dataflow architectures, including static scheduling, pipeline parallelism, or tensor parallelism at scale.

  • Contributions to opensource ML frameworks, compilers, or runtime systems, particularly in areas related to performance or scalability.

  • Demonstrated research impact, such as publications or presentations at conferences like PLDI, CGO, ASPLOS, ISCA, MICRO, MLSys, NeurIPS, or similar.

  • Experience with large-scale AI distributed inference or training systems, including performance modeling and capacity planning for multi rack deployments.

 

#LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
135,000 CAD – 185,000 CAD for Level 3; and 170,000 CAD – 220,000 CAD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

Skills Required

  • Master’s or PhD in Computer Science, Electrical/Computer Engineering, or a related field, or equivalent experience
  • At least 5 years of relevant experience
  • Strong software engineering background with systems-level programming proficiency in C, C++, and/or Rust
  • Strong knowledge of data structures, algorithms, and concurrency
  • Hands-on compiler or runtime development experience, including IR design, optimization passes, or code generation
  • Experience with LLVM and/or MLIR, including custom passes, dialects, or integrations
  • Familiarity with TensorFlow and PyTorch
  • Experience with portable graph formats such as ONNX
  • Understanding of parallel and heterogeneous compute architectures, including GPUs or spatial accelerators
  • Analytical and debugging skills using profiling, tracing, and benchmarking tools
  • Strong communication and collaboration skills across hardware, systems, and software teams
  • Experience with MLIR-based compilers or other multilevel IR stacks for graph-based deep learning workloads
  • Experience with spatial or dataflow architectures, static scheduling, pipeline parallelism, or tensor parallelism at scale
  • Open-source contributions to machine learning frameworks, compilers, or runtime systems
  • Research publications or presentations at ML, compiler, or computer architecture conferences
  • Experience with large-scale distributed AI inference or training systems, performance modeling, or multi-rack capacity planning

NVIDIA Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NVIDIA and has not been reviewed or approved by NVIDIA.

  • Equity Value & Accessibility — Company stock and RSUs have driven exceptional total compensation, with a generous employee stock purchase plan and ongoing equity refreshers playing a central role. Feedback suggests historic share-price gains created significant financial upside for many.
  • Healthcare Strength — Multiple plan options (HSA, PPO, and in some locations Kaiser) with in-network preventive care covered at 100% and company HSA contributions indicate a robust offering. Mental-health sessions and broad dental, vision, and disability coverage further strengthen the package.
  • Parental & Family Support — Up to 22 weeks of fully paid parental leave, adoption and surrogacy reimbursement, and coverage for IVF and egg freezing are highlighted as standout features. Additional family-care resources and caregiving support broaden the appeal.

NVIDIA Insights

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The Company
HQ: Santa Clara, CA
21,960 Employees
Year Founded: 1993

What We Do

NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, NVIDIA is increasingly known as “the AI computing company.”

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