K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.
The Role
We are seeking a Senior FPGA & Silicon Bring-up Engineer to accelerate the development of next-generation communications ASICs. You will own FPGA prototyping, firmware enablement, first-silicon bring-up, and hardware validation, serving as the bridge between ASIC design, firmware, software, and system integration. This role spans the entire silicon lifecycle from pre-silicon FPGA platforms that enable early hardware/software integration to post-silicon debug, interface validation, and automated test infrastructure.
Responsibilities
- Develop FPGA-based prototypes to enable early ASIC integration, firmware development, and system validation.
- Build hardware platforms that allow software and firmware teams to develop before first silicon.
- Support first-silicon bring-up, debug, and functional validation.
- Develop automated validation infrastructure for silicon characterization and regression testing.
- Configure and validate digital interfaces including high-speed Ethernet SerDes, SPI, UART, GPIO, and other peripheral interfaces.
- Develop FPGA-based traffic generators, protocol checkers, and test applications for interface validation.
- Debug issues spanning RTL, firmware, software, FPGA prototypes, and silicon using simulation and laboratory instrumentation.
- Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development.
Qualifications
- BS or MS in Electrical Engineering, Computer Engineering, or related field.
- 5+ years of FPGA development experience using Verilog/SystemVerilog and AMD/Xilinx FPGA tools.
- Strong understanding of ASIC development and digital system architecture.
- Experience with FPGA prototyping for ASIC development.
- Experience with firmware/software enablement and hardware bring-up.
- Strong hardware debugging skills using JTAG, oscilloscopes, logic analyzers, and protocol analyzers.
- Proficiency with Python and scripting for automation and test infrastructure.
Nice to Have
- Experience with networking, communications, or satellite systems.
- Experience with embedded processors (ARM or RISC-V).
- Experience working with hard real-time embedded systems (bare-metal or RTOS).
- Experience validating high-speed digital interfaces, including Ethernet and SerDes protocols, SPI, and UART.
- Experience with silicon bring-up using JTAG, logic analyzers, and oscilloscopes.
Compensation and Benefits:
- Base salary range for this role is $120,000 – $225,000 + equity in the company
- Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
- Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks
If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!
If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.
Export Compliance
As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”
The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
Equal Opportunity
K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Skills Required
- BS or MS in Electrical Engineering, Computer Engineering, or related field
- 5+ years FPGA development experience using Verilog/SystemVerilog and AMD/Xilinx FPGA tools
- Strong understanding of ASIC development and digital system architecture
- Experience with FPGA prototyping for ASIC development
- Experience with firmware/software enablement and hardware bring-up
- Hardware debugging skills using JTAG, oscilloscopes, logic analyzers, and protocol analyzers
- Proficiency with Python and scripting for automation and test infrastructure
- Must be a U.S. person or otherwise eligible for federally issued export control license (ITAR)
- Experience with networking, communications, or satellite systems
- Experience with embedded processors (ARM or RISC-V)
- Experience with hard real-time embedded systems (bare-metal or RTOS)
- Experience validating high-speed digital interfaces including Ethernet and SerDes protocols
What We Do
Making previously impossible missions possible
