Senior Digital Design Engineer

Posted 2 Days Ago
Be an Early Applicant
San Jose, CA, USA
In-Office
Senior level
Big Data • Information Technology
The Role
Develops front-end digital circuit designs for high-performance network controllers, including microarchitecture, RTL, simulation, synthesis, IP integration, verification, DFT, silicon bring-up, and debugging. The role involves working with high-speed protocols such as PCIe, UALink, Esun, and Ethernet, using Synopsys or Cadence design flows and UVM-based verification. A Bachelor’s degree in Electrical Engineering and US work authorization are required.
Summary Generated by Built In

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.


Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. 

Job Description 

We are looking for Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration for high performance network controllers. The candidate is preferred to have knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc. 

Basic Qualifications: 

  • Strong academic and technical background in electrical engineering. A Bachelor’s degree in EE is required, and a Master’s degree is preferred. 
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks. 
  • Entrepreneurial, open-mind behavior and can-do attitude. 
  • Authorized to work in the US and start immediately. 

Required Experience: 

  • Hands-on, prefer knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc. 
  • Proven front end design skill – architecture, RTL, simulations and synthesis 
  • Experience with Synopsys and/or Cadence digital design tools/flows 
  • Knowledge of design for test (DFT) 
  • Familiarity with UVM based design verification 
  • Silicon bring-up and debug experience 

Preferred Experience: 

  • Scripting with Python or other equivalent programming languages. 
  • Development/support for PCIe or Ethernet Switch products. 

 

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Skills Required

  • Bachelor’s degree in Electrical Engineering
  • Authorized to work in the United States
  • Ability to start immediately
  • Hands-on experience with high-speed protocols such as PCIe, UALink, Esun, or Ethernet
  • Front-end digital design experience, including architecture, RTL, simulation, and synthesis
  • Experience with Synopsys and/or Cadence digital design tools and flows
  • Knowledge of design for test (DFT)
  • Familiarity with UVM-based design verification
  • Silicon bring-up and debugging experience
  • Strong academic and technical background in electrical engineering
  • Master’s degree in Electrical Engineering
  • Scripting experience with Python or equivalent programming languages
  • Development or support experience for PCIe or Ethernet switch products

Astera Labs Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Astera Labs and has not been reviewed or approved by Astera Labs.

  • Healthcare Strength — Health plans are described as competitive and employer-subsidized, covering medical, dental, and vision for employees and dependents. Company materials and listings consistently emphasize strong core healthcare coverage.
  • Leave & Time Off Breadth — Flexible time off is highlighted alongside paid company holidays, with guidance indicating generous PTO when coordinated with teams. Documented policies also point to robust time-off structures across locations.
  • Equity Value & Accessibility — Stock-based compensation is a meaningful part of total pay, with RSUs and an employee stock purchase plan noted as part of the package. Public-company status enhances perceived value and accessibility of equity components.

Astera Labs Insights

Am I A Good Fit?
beta
Get Personalized Job Insights.
Our AI-powered fit analysis compares your resume with a job listing so you know if your skills & experience align.

The Company
HQ: San Jose, CA
148 Employees
Year Founded: 2017

What We Do

Astera Labs Inc., a fabless semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center. Partnering with leading processor vendors, cloud service providers, seasoned investors, and world-class manufacturing companies, Astera Labs is helping customers remove performance bottlenecks in data-intensive systems that are limiting the true potential of applications such as artificial intelligence and machine learning. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity.

Similar Jobs

Boeing Logo Boeing

Design Engineer

Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
In-Office
El Segundo, CA, USA
170000 Employees
146K-223K Annually

Marvell Technology Logo Marvell Technology

Design Engineer

Artificial Intelligence • Automotive • Semiconductor
In-Office
2 Locations
6500 Employees
136K-201K Annually

Semtech Logo Semtech

Sr. Design Verification Engineer - Digital

Internet of Things • Semiconductor
Hybrid
San Diego, CA, USA
1475 Employees
130K-200K Annually

Credo Logo Credo

Design Engineer

Hardware • Information Technology • Semiconductor
In-Office
San Jose, CA, USA
548 Employees
130K-200K Annually

Similar Companies Hiring

Axle Health Thumbnail
Artificial Intelligence • Healthtech • Information Technology • Logistics
Santa Monica, CA
25 Employees
NODA AI Thumbnail
Artificial Intelligence • Information Technology • Software • Cybersecurity
Sydney, AU
54 Employees
Golden Pet Brands Thumbnail
Digital Media • eCommerce • Information Technology • Marketing Tech • Pet • Retail • Social Media
El Segundo, California
178 Employees

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account