Senior Design Verification Engineer

Partner with local and global SOC and IP developers to drive best practices with a target of ongoing productivity improvement. Responsible for the development of verification test bench and implementation. Develop verification test bench components such as drivers, monitors, and response checkers. Analyze RTL code coverage results. Develop, direct and constrain random stimulus. Responsible for functional coverage methods. Develop system Verilog assertions. Implement formal verification methods. Conduct debugging, failure recreation and root cause analysis. Apply principles and theoretical knowledge of electrical and electronic engineering.

Qualifications:

Bachelor’s degree in Electrical Engineering, Electronics Engineering, or Computer Engineering (with related variants such as VLSI or Physics), foreign equivalent, or related field.

Five (5) years of experience required in job offered, Project Engineer, Senior Professional or related occupation.

Required skills:

Position requires three (3) years of experience in the following specific skills:

• Verilog and System Verilog ;
• UVM;
• Perl Scripting;
• AXI and APB;
• JTAG and Testport
• Die Measurement (ODM) controller; and
• Knowledge of VCS/Verdi/DVE tool.

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.