Senior Analog IC Design Engineer

Posted One Month Ago
Be an Early Applicant
Taipei City, TWN
In-Office
Senior level
Semiconductor • Manufacturing
The Role
Design and develop analog/mixed-signal IC blocks from specification through post-silicon verification. Tasks include circuit design and simulation, physical design handoff, integration into complex digital chips, bench test plan definition, post-silicon characterization and debug, and mentoring junior engineers.
Summary Generated by Built In
Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

The Senior Analog IC Design Engineer is responsible for the design and development of analog, mixed-signal IC circuit blocks from initial specification and architecture to final, post-silicon verification to ensure specifications are met.

Responsibilities include:

  • Analog, mixed-signal circuit design and simulation.

  • Work with mask designers to deliver physical design.

  • Integration of analog/mixed-signal blocks into large, complex, digital chips.

  • Define bench-level test plans for post-silicon characterization.

  • Post-silicon measurements, characterization, and debug.

  • Lead/mentor junior engineers.

Qualifications:

  • BS, MS, and/or PhD in Electrical Engineering or related fields.

  • Multiple years of experience working in analog/mixed-signal circuit design (BSEE, 10+ years, MS 8+ years, PhD 5+ years).

  • Proven design experience in most of the following analog, mixed-signal circuits: SerDes receivers/transmitters, low-jitter PLLs, oscillators, phase interpolators, ADC/DAC, high speed clock distribution, bandgap/bias, and voltage regulators.

  • In-depth knowledge of transistor mismatch, linearity, stability, low-power and low-noise techniques.

  • Experience designing circuits in advanced FinFET technologies.

  • Proficient in AMS design flows, tools, and methodologies like Cadence schematic capture, Virtuoso, Spectre, layout, and analog behavioral modeling.

  • Detailed oriented, with excellent problem-solving skills, communication skills, and the ability to work collaboratively in a fast-paced, team environment.

#LI-DNP

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Taiwan

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry.  Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. 


Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions.  Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win.  For more information about how our FPGA, CPLD and programmable power management  devices help our customers unlock their innovation, visit 
www.latticesemi.com.  You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.  Applications are welcome from all qualified candidates.

 

Skills Required

  • BS, MS, or PhD in Electrical Engineering or related field
  • Multiple years of analog/mixed-signal circuit design experience (BSEE 10+ years, MS 8+ years, PhD 5+ years)
  • Proven design experience with SerDes receivers/transmitters, low-jitter PLLs, oscillators, phase interpolators, ADC/DAC, high-speed clock distribution, bandgap/bias, and voltage regulators
  • In-depth knowledge of transistor mismatch, linearity, stability, low-power and low-noise design techniques
  • Experience designing circuits in advanced FinFET technologies
  • Proficiency in AMS design flows and tools (Cadence schematic capture, Virtuoso, Spectre), layout, and analog behavioral modeling
  • Experience defining bench-level test plans and performing post-silicon measurements, characterization, and debug
  • Ability to lead and mentor junior engineers; strong problem-solving and communication skills
  • Successful background and reference checks and proof of right to work in Taiwan
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The Company
HQ: Hillsboro, OR
975 Employees
Year Founded: 1983

What We Do

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive and consumer markets. Our technology, long-standing relationships, and commitment to world-class support lets our customers quickly and easily unleash their innovation to create a smart, secure and connected world. Lattice was founded in 1983 and is headquartered in Hillsboro, Oregon with major operations in San Jose, California, Shanghai, China, and Manila, Philippines.

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