Join us to help build the next generation of AI hardware solutions. You will be part of a team developing cutting-edge HW for the AI domain, where we push the boundaries of what silicon can do for emerging AI workloads.
We are continuously developing modern and effective working methods, including hands-on adoption of AI tools throughout the chip development flow. The environment is fast-paced and intellectually stimulating.
Your Mission: Integrate hardware security IP into the SoC/die and define the HW security architecture protecting a large-scale data center's compute, network, and control infrastructure.
Responsibilities:
- Integrate third-party and internal HW security IP (Root of Trust, crypto engines, HSMs, TRNG, key vaults) into the die; write and own the RTL/integration code wiring these units into the SoC.
- Author RTL for security units, glue logic, fuse/OTP interfaces, and bus/fabric (AXI/AHB/NoC) connections; manage clock/reset/power domains and CDC.
- Develop integration test benches, run lint/CDC/synthesis-readiness checks, and support DV/verification of the embedded security IP.
- Architect platform Root of Trust, secure boot, attestation, and confidential computing (TDX/SGX/SEV-equivalent) across the server fleet.
- Threat-model the full stack (silicon, firmware, BMC, supply chain) and define HW mitigations against physical and side-channel attacks.
- Drive secure key management, debug-lockdown, fuse provisioning, and crypto offload for tenant isolation at scale.
- Collaborate closely with architecture, design verification, physical design, firmware, and platform teams throughout the development cycle.
- B.Sc., M.Sc., or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 5+ years of experience in RTL development, SoC design, or hardware security integration.
- Proficient in Verilog/SystemVerilog RTL, IP integration, bus protocols (AXI/AHB/NoC); lint, CDC, synthesis, DV flows.
- Expertise in roots of trust, TEEs, secure boot/firmware, crypto IP, side-channel mitigations.
- Plus: fuse/OTP provisioning, supply-chain security, multi-tenant cloud isolation.
Job Type:Experienced HireShift:Shift 1 (Israel)Primary Location: Israel, HaifaAdditional Locations:Israel, Petah-TikvaPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
Skills Required
- B.Sc., M.Sc., or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- 5+ years of experience in RTL development, SoC design, or hardware security integration
- Proficiency in Verilog/SystemVerilog RTL
- Experience with IP integration and AXI, AHB, or NoC bus protocols
- Experience with lint, CDC, synthesis, and design verification flows
- Expertise in roots of trust, trusted execution environments, secure boot/firmware, crypto IP, and side-channel mitigations
- Experience with fuse/OTP provisioning, supply-chain security, and multi-tenant cloud isolation
- Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
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