RTL2GDS IC Sr. Principal Design Engineer

Posted 14 Days Ago
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San Jose, CA, USA
In-Office
161K-299K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Leads customer-facing pre-sales and post-sales support for Cadence digital IC implementation and signoff products. Provides expertise in synthesis, place and route, design closure, timing and power signoff, STA, and SDC debugging. Conducts presentations, demonstrations, benchmarks, and technical evaluations; improves implementation flows using Tcl, Perl, and shell scripting; collaborates with R&D; supports business cases; and mentors junior engineers.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
  • Job Description

    • The ideal candidate will be energetic, innovative and enthused with how to help customers, solve their toughest Digital Implementation problems using Cadence technology. Will drive Pre-sales and Post–sales activities at advanced nodes for Cadence Digital IC products.

  • Key Responsibilities

    • Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, and timing/power signoff
    • Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
    • Conduct technical presentations and product demonstrations
    • Drive technical evaluations/benchmarks to success
    • Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
    • Drive adoption and proliferation of Cadence tools and technologies
    • Amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows
    • Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements 
    • Provide technical support, when developing business case for process improvement projects.
    • Provide mentorship to junior engineers

      

    Job Requirements

    • Requires a BS or MS or PhD in EE with/or 10-12 years industry related experience in design and EDA (Digital Implementation/Signoff)
    • Understands ASIC Design implementation process and steps
    • Strong hands-on experience with Place & Route (Innovus, ICC2, Fusion Compiler)
    • Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler)
    • Experience with EDA tools in the IC digital implementation & signoff flows (STA tools)
    • Strong STA and SDC debugging abilities are required.
    • Low power analysis, Clock design/analysis and hands-on 7/5nm technology node experience a plus.
    • Automation skills using Perl, Tcl and shell scripting essential 
    • Strong analytical & analysis skills covering digital implementation is critical. 
    • Proven track record and experience working in a fast paced environment 
    • Excellent customer interaction & presentation skills

The annual salary range for California is $161,000 to $299,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • BS, MS, or PhD in Electrical Engineering
  • 10-12 years of industry experience in digital design and EDA
  • Understanding of the ASIC design implementation process and steps
  • Strong hands-on experience with place and route using Innovus, ICC2, or Fusion Compiler
  • Experience with synthesis using Genus, RTL Compiler, or Design Compiler
  • Experience with EDA tools in digital implementation and signoff flows, including STA tools
  • Strong static timing analysis and SDC debugging abilities
  • Automation skills using Perl, Tcl, and shell scripting
  • Strong analytical and analysis skills covering digital implementation
  • Proven experience working in a fast-paced environment
  • Excellent customer interaction and presentation skills
  • Low-power analysis experience
  • Clock design and analysis experience
  • Hands-on experience with 7nm or 5nm technology nodes

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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