Broadcom

R&D Physical Design Engineer

Posted 9 Hours Ago

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Hiring Remotely in Zhangjiang, Shanghai Municipality, Shanghai, CHN

Remote

Senior level

Software • Semiconductor • Manufacturing

The Role

Responsible for physical design implementation including floorplanning, placement, design closure, STA, DRC/LVS and full-chip signoff (PI, SI, PV). Independently handle block and top-level implementation and work toward tapeout readiness at 7nm and below. Collaborate cross-functionally and use scripting (Perl/Tcl) to automate flows and resolve timing, power, and DRC/LVS issues.

Summary Generated by Built In

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Job Description:

Physical Design Implementation: An ideal candidate having strong background in either the Physical Design which includes floor planning, placement, design closure, STA, and DRC & LVS skills.
Overall, candidates are expected to develop the most of above skills. Candidates who have the desire to seek the in-depth and broad technical challenge should apply.
It would be better if the candidate have the experience running full chip signoff tasks including PI, SI, PV and STA.

Requirements/Qualifications
- Candidates should have good understanding about ASIC design flow and solid VLSI background.
- Candidates should be able to handle block implementation/top level task independently.
- Tapeout experience in 7nm and blow process design.
- Candidate s should have strong communications and problem solving skills.
- Candidates with experience in any one of following knowledge are a plus
- DFT insertion
- Power/IVD analysis
- DRC/LVS
- STA
- Candidate is good at Perl/Tcl

Education/Certifications
Preferred Degree: 7+ years MS Preferred
Major: Microelectronics or related discipline

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

Good understanding of ASIC design flow and solid VLSI background
Able to handle block implementation and top-level tasks independently
Tapeout experience in 7nm and below process nodes
Strong communication and problem-solving skills
Experience with STA (Static Timing Analysis)
Proficiency in Perl and Tcl scripting
Experience with DFT insertion
Power/IVD analysis experience
DRC/LVS experience
7+ years experience; MS preferred

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.