Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide.
We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for physical design and integration of advanced packaging interposers within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing.
Key Responsibilities
- Physical design and integration of interposers used within advanced packaging for quantum computing
- Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers
- Design validation and verification; including DRC and LVS
- Deliver and disseminate design milestones to stakeholders
- Communicate designs in presentations and relevant documentation
- Stay current with the latest developments in packaging technology and design techniques by attending conferences and reading papers
As a successful candidate, you must possess
- Excellent communication and presentation skills for technical and non-technical audiences
- Strong analytical thinking and problem-solving capabilities
- Collaborative mindset with ability to work effectively across diverse teams
- Adaptability to work in a fast-paced, innovative research environment
- Passion for pushing the boundaries of quantum technology development
Join Intel's Quantum Computing Group where we are building the future of quantum computing. If you're passionate about working at the forefront of quantum computing packaging and want to work with the resources and expertise of the world's leading semiconductor company, we want to hear from you. Apply today and discover your place in our world-changing work.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of relevant industry job experience, internship experience and/or schoolwork/classes/research.
Minimum Qualifications:
- M.S. degree in Electrical Engineering AND 5+ years of experience in physical design of silicon testchips, interposers, and/or related hardware.
- OR Ph.D. degree in Electrical Engineering with academic or work experience in the related areas.
The experience must include:
- Cadence Virtuoso
- Understanding of how signal and power integrity (SI/PI) impacts physical design.
- Understanding of advanced packaging technologies.
Preferred Qualifications:
- Strong understanding of superconducting metals.
- Proven experience with Synopsys and Ansys software packages for APR (automated place and route).
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- M.S. degree in Electrical Engineering and 5 or more years of experience in physical design of silicon testchips, interposers, or related hardware
- Alternatively, a Ph.D. degree in Electrical Engineering with academic or work experience in related areas
- Experience with Cadence Virtuoso
- Understanding of how signal integrity and power integrity affect physical design
- Understanding of advanced packaging technologies
- Strong understanding of superconducting metals
- Experience with Synopsys and Ansys software packages for automated place and route
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
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Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
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Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.
Intel Insights
What We Do
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.
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