Product Failure Analysis Engineer

Posted 3 Days Ago
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San Jose, CA, USA
In-Office
149K-216K Annually
Senior level
Artificial Intelligence • Internet of Things • Machine Learning
The Role
Performs semiconductor failure analysis, electrical fault isolation, and root-cause investigations for FPGA yield, reliability, and customer-return issues. Uses non-destructive techniques including EMMI, LVP, and OBIRCH, along with commercial testers and layout, schematic, and design-analysis tools. Partners with product, yield, reliability, design, foundry, manufacturing, packaging, and physical failure analysis teams to improve product quality and reliability.
Summary Generated by Built In
Job Details:

Job Description:

About Altera

At Altera™, our independence as the world’s largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industryleading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

We are seeking an experienced semiconductor Failure Analysis Engineer responsible for debug and root cause analysis of yield, reliability and customer returns on FPGA’s using advanced foundry process technologies.  This role requires partnering with IC and Package design, Foundry Engineering, Product and manufacturing Engineering, and Reliability teams for driving systematic fault isolation and debug.

In this role, focus will be on non-destructive electrical fault isolation by debugging electrical test responses and circuit/layout analysis.  Experience in using fault isolation using Photo Emission/Infrared microscopy (EMMI), Laser Voltage Probing (LVP) and Optical Beam Induced Resistance Change (OBIRCH) and other fault isolation tools is required.

Key Responsibilities

  • Collaborate with Product/Yield/Reliability Engineers to drive electrical verification, and fault isolation during product development, yield improvement and reliability risk assessments

  • Support debug and fault isolation on customer returns

  • Define, execute and interpret fault isolation methods as appropriate to non-destructively isolate a failure using commercial testers and fault isolation tools

  • Proficient in independently using Emission microscopes, Laser Voltage Probing and OBIRCH tools

  • Experienced with layout, schematic and design analysis tools

  • Collaborate with physical failure analysis team on defect modes

Salary Range

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$149,100 - $215,925 USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.

#LI-MD1

Qualifications:

Minimum Qualifications

  • Bachelor's degree in Electrical Eng, Materials Science, Physics, Mechanical Engineering or a related field

  • 8+ years of experience in semiconductor failure analysis

  • 8+ years of experience with Layout & Design tools (Virtuoso, Avalon, SysNav, etc)

  • 8+ years of experience with FA tools such as Laser Voltage Probing (LVP), Photo Emission EMMI, Optical Beam Induced Resistance Change (OBIRCH)

  • 8+ years of experience with DFT and logic fault localization knowledge.

  • 8+ years of experience driving investigations to root-cause and to drive yield/reliability improvements.

Preferred Qualifications

  • 10+ years of experience in semiconductor failure analysis

  • Understanding of FPGA architecture

  • Understanding design debug features (DFT)

  • Experience with using Teradyne Ultraflex tester

  • Semiconductor packaging failure analysis.

Job Type: Regular

Shift:Shift 1 (United States of America)

Primary Location:San Jose, California, United States

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Skills Required

  • Bachelor's degree in Electrical Engineering, Materials Science, Physics, Mechanical Engineering, or a related field
  • 8 or more years of experience in semiconductor failure analysis
  • 8 or more years of experience with layout and design tools such as Virtuoso, Avalon, and SysNav
  • 8 or more years of experience with failure analysis tools including Laser Voltage Probing, Photo Emission EMMI, and OBIRCH
  • 8 or more years of experience with DFT and logic fault localization
  • 8 or more years of experience driving root-cause investigations and yield or reliability improvements
  • 10 or more years of experience in semiconductor failure analysis
  • Understanding of FPGA architecture
  • Understanding of design debug features and DFT
  • Experience using the Teradyne Ultraflex tester
  • Experience with semiconductor packaging failure analysis

Altera (altera.com) Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Altera (altera.com) and has not been reviewed or approved by Altera (altera.com).

  • Retirement Support Feedback suggests retirement programs are robust, with offerings such as a 401(k) and a pension. This breadth supports long-term financial security.
  • Leave & Time Off Breadth Feedback suggests time-off policies are generous, including PTO, paid sick days, and paid holidays. Wellness initiatives like gym memberships further support balance.
  • Parental & Family Support Feedback suggests parental leave is generous. Family-building support, including fertility benefits and adoption reimbursement, is highlighted as part of the package.

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The Company
HQ: San Jose, California
1,612 Employees
Year Founded: 1983

What We Do

Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.

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