Product Engineer II (EMIR / PDN Analysis & Power Integrity)

Reposted 25 Days Ago
Be an Early Applicant
Austin, TX, USA
In-Office
102K-189K Annually
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Develop and validate power integrity and PDN analysis methodologies for digital sign-off. Collaborate with R&D to build AI-driven IR mitigation, 3DIC and electrothermal optimization flows, support strategic customers, and drive multiphysics product engineering and solutions.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Responsibilities
•    Be part of the product engineering team working on Power Noise Reliability analysis platform within Digital Sign-off Group at Cadence.
•    Build domain expertise in power integrity , 3DIC analysis & optimization , Industry’s first AI driven IR mitigation & fixing methodology , electrothermal optimization for digital designs.
•    Work closely with R&D to facilitate the development of these methodologies and flows.
•    Responsibilities also including supporting strategic customers and functional product engineering driving solutions in the Multiphysics space.

Minimum Qualifications

·  Bachelor’s Degree in; Electrical / VLSI Engineering with 3+ years related experience

·  OR Masters with relevant courses in digital systems in Electrical Engineering

Experience and Technical Skills required

·  Coursework related to advanced digital logic design and advanced Very Large Scale Integrated-circuit (VLSI)

·  Fundamental understanding in Digital logic Design, CMOS logic Design, Power IR drop analysis, Circuit Design and Analysis, Digital and Behavioral simulations

· Relevant coursework/projects or experience in physical design implementation flow using automatic placement and routing tool.

· Ability to debug IR drop, Timing, and Electrical PDN issues in relation to IR and EM is a plus

· Knowledge on Python or TCL scripting.

Behavioral skills required
•    Must possess strong written, verbal and presentation skills.
•    Ability to establish a close working relationship with both customer peers and management.
•    Explore what’s possible to get the job done, including creative use of unconventional solutions.
•    Work effectively across functions and geographies.
•    Push to raise the bar while always operating with integrity.

The annual salary range for California is $101,500 to $188,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Bachelor's degree in Electrical or VLSI Engineering with 3+ years related experience (or Master's with relevant coursework)
  • Coursework or experience in advanced digital logic design and VLSI
  • Fundamental understanding of Digital Logic Design, CMOS Logic Design, and Circuit Design and Analysis
  • Knowledge of Power IR drop analysis, PDN analysis, and IR/EM concepts
  • Relevant coursework, projects, or experience in physical design implementation flow using automatic placement and routing tools
  • Ability to debug IR drop, timing, and electrical PDN issues related to IR and EM
  • Knowledge of Python or TCL scripting
  • Strong written, verbal, and presentation skills and ability to work across functions and geographies

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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