Process Integration Development Engineer - Defect Metrology

Posted 12 Hours Ago
Be an Early Applicant
Hillsboro, OR, USA
In-Office
134K-189K Annually
Junior
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Develops defect metrology and process integration strategies for advanced semiconductor technologies. Responsibilities include characterizing yield-limiting defects, investigating root causes, developing metrology recipes, responding to baseline shifts, driving defect-reduction roadmaps, qualifying process fixes, and collaborating with integration, yield, and failure-analysis teams. The role requires strong experimental research, statistical analysis, semiconductor processing, problem-solving, and communication skills.
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Job Details:

Job Description: 

Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.


Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet.


Life at Intel: https://jobs.intel.com/en/life-at-intel


At Intel's Logic Technology Development (LTD), we have continued to extend Moore's law to be world leaders in computing technology. To achieve the necessary scaling of our semiconductor manufacturing process, we have led the industry in developing enhancements such as strained silicon for carrier transport enhancement, high-k metal gates, FinFETs, and next-generation Gate-All-Around architectures. LTD has been at the center of every new development that has kept Moore's Law moving forward.

Defect Metrology plays a key role in the development of every new silicon process technology. Our analysis builds the plan that allows LTD to take technology from the research phase to the high-volume manufacturing phase while maintaining high-quality standards. In the Manufacturing Integration Engineering (MIE) organization, we engineer world-class yields on advanced processes by driving defects down to Best-in-Class targets.

As a Defect Metrology Engineer, you will be responsible for identifying all defects that impact yield and performance in an advanced silicon process technology. You will characterize the process using cutting-edge metrology tools. With this characterization, you will be responsible for investigating the root cause owners and developing defect reduction roadmaps to achieve program milestone commitments to our customers. You will then work directly with the process modules and integration teams to drive that roadmap by developing and qualifying process fixes through Model-Based Problem Solving (MBPS). You will also respond to defect baseline shifts to isolate the root cause and implement preventative actions consistent with 8D methodology. This role provides an opportunity to influence Intel's future process technologies that will keep Moore's Law moving forward.


Responsibilities include but are not limited to:

  • Owning a segment of the process to ensure adequate metrology is placed to detect and respond to all yield-limiting defects prior to reaching end-of-line sort.
  • Investigate and respond to exclusionary baseline shifts to ensure segment defect health is restored to capable, demonstrated baseline.
  • Develop new recipes and RFCs as part of New Product Introduction (NPI).
  • Provide navigation and leadership to meet Intel's yield objectives, utilizing state-of-the-art metrology tools and test vehicles (QTM, Short Loop, etc.).
  • Organizing and presenting defect summaries to F25, LTD, MDCE engineering teams.
  • Partnering with Intel Integration, Yield, and failure analysis labs to provide root cause for all defect issues.
  • Hold the team and collaborators accountable for quality through Integrated Module Team (IMT) and Focus Team (FT) forums.
  • Work collaboratively as a part of the overall LTD Defect metrology group.
  • Role-model and establish a team culture of trust, collaboration, safety, accountability, and sustaining excellence.
  • Build strong relationships with other LTD teams based on mutual trust and respect.

 

The Ideal Candidate Must Demonstrate:

  • Strong data analysis and problem debug skills.
  • Team player with flexibility and adaptability to changing business needs.
  • Strong ownership mindset and driving closure-see the problem, own the problem.
  • Excellent communication and navigation skills to larger audiences.
  • Understand and adhere to Intel cultural values such as Customer First, Fearless Innovation, Results Driven, One Intel, Integrity, Quality, Inclusion.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and internship experience.

 

Minimum qualification/s:

Must possess a PhD degree in Computer Science, Physics, Material Science and Engineering, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Nuclear engineering, Optics, or Chemistry (with focus on hands on experimental research)

 

Preferred qualifications:


Minimum of 1+ years of experience with one or more of the following:


  • Experimental research - designing and conducting experiments, operating equipment (characterization, fabrication, synthesis), analyzing statistical data
  • Materials characterization (SEM, TEM, etc.), materials fabrication, synthesis, metrology, statistical or data analysis (MATLAB, Excel, JMP, etc.)
  • Semiconductor processing fundamentals (lithography, wet and or dry etch, chemical and or mechanical polishing, etc.), semiconductor and or transistor device physics, and design of experiments.
  • Defect metrology, defect improvement, yield improvement, or process integration
  • Demonstrate experience of Statistical Process Control (SPC), or Design of Experiments (DOE) principles
  • Complex problem-solving methodologies - root cause analysis, model-based problem solving (MBPS), 5 Why, Fishbone, etc.
  • Understanding of semiconductor physics or semiconductor processing
  • Understanding of defect metrology tools such as brightfield, darkfield, or voltage contrast (VC)

We welcome motivated professionals to bring their expertise and enthusiasm to Intel, where you will have the opportunity to grow your career while helping to shape the future of technology in a collaborative and forward-thinking environment. Apply today to be part of Intel's journey to redefine possibilities.


Interview Tips: https://www.intel.com/content/www/us/en/jobs/hiring.html

          

Job Type:College Grad

Shift:Shift 1 (United States of America)

Primary Location: US, Oregon, Hillsboro

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • PhD in Computer Science, Physics, Materials Science and Engineering, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Nuclear Engineering, Optics, or Chemistry with hands-on experimental research focus
  • At least 1 year of experience with experimental research, including experimental design, equipment operation, characterization, fabrication, synthesis, or statistical data analysis
  • Experience with materials characterization, fabrication, synthesis, metrology, or statistical/data analysis using MATLAB, Excel, or JMP
  • Understanding of semiconductor processing fundamentals, semiconductor or transistor device physics, and design of experiments
  • Experience with defect metrology, defect improvement, yield improvement, or process integration
  • Experience with Statistical Process Control or Design of Experiments principles
  • Experience with root cause analysis, Model-Based Problem Solving, 5 Why, or Fishbone methodologies
  • Understanding of semiconductor physics or semiconductor processing
  • Understanding of brightfield, darkfield, or voltage contrast defect metrology tools
  • Strong data analysis, problem debugging, communication, collaboration, ownership, and adaptability skills

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

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HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

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