Process Engineer (Hybrid Bonding, TSV reveal & bumping)

Posted Yesterday
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Singapore
Mid level
Semiconductor
The Role
The Process Engineer will work on semiconductor equipment, handling wafer processes, designing recipes, analyzing data, troubleshooting issues, and generating technical reports. The role involves collaboration with the CTO team and management of vendors, focusing on improving semiconductor manufacturing processes.
Summary Generated by Built In

Applied Materials is the global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service manufacturing equipment for the semiconductor and display industries. Our innovations are at the foundation of the technology that transforms every part of our lives. We offer an exciting place to grow and learn alongside some of the best people you’ll ever meet. Join us to Make Possible a Better Future.

The Advanced Packaging Development Center (APDC) is a state-of-the-art cleanroom that is among the most advanced wafer-level packaging labs in the world. It houses the industry’s broadest portfolio of products that enable the foundational building blocks of heterogeneous integration, including advanced bump and micro-bump, fine-line redistribution layer (RDL), TSV and hybrid bonding. APDC was established as a joint lab partnership with the Institute of Microelectronics (IME), a research institute of Singapore’s Agency for Science, Technology and Research (A*STAR).

We are currently seeking for an experienced and passionate Process Engineer (R&D) to join APDC now. Apply now if you fit the description below!

Key Responsibilities

  • Work closely with Process Integration, and the CTO USA team, hands on running wafers on semiconductor equipment using MES systems to run process operations.

  • Design, create recipes, collect data, analyze and compile reports on moderately difficult process engineering experiments, within safety guidelines

  • Perform hardware characterization on moderately difficult systems, within safety guidelines

  • Troubleshoot moderately complex problems, perform Root Cause Analysis and resolve moderately difficult process engineering issues

  • Measure film properties, organize data/reports for review and interpret data

  • Generate internal documentation for products, presentations and technical reports

  • Interact with customers to resolve moderately difficult process engineering issues/problems under general supervision

  • Identify, select and work with vendors and suppliers under general supervision

  • Implement new technology, products and analytical instrumentation

Requirements

  • Relevant Engineering education qualification

  • Research experiences focusing in semiconductor industry

  • Past experiences in dealing with MES systems is a plus

  • Stakeholder management

  • Good communication and interpersonal skills

Work Location

  • Science Park II

Qualifications

Education:

Bachelor's Degree

Skills:

Certifications:

Languages:

Years of Experience:

2 - 4 Years

Work Experience:

Additional Information

Time Type:

Full time

Employee Type:

Assignee / Regular

Travel:

Yes, 20% of the Time

Relocation Eligible:

Yes

Applied Materials is an Equal Opportunity Employer committed to diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law. 

The Company
HQ: Santa Clara, CA
23,282 Employees
On-site Workplace
Year Founded: 1969

What We Do

Applied Materials is the leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. At Applied Materials, our innovations make possible a better future.

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