Principal System Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

High Speed Serdes IP Principal System Engineer

Position Description:    

This is a unique opportunity to join the rapidly growing team in the SerDes IP R&D Group at Cadence Design Systems. We are looking for a Principal System Engineer who will be a key contributor to our advanced high speed SerDes IP products.

This is a hands-on customer facing technical position 

Main Job Tasks and Responsibilities:

• Engage with IP customers to review Serdes IP integration guidelines, provide integration training and recommendations to customer
• Help customer resolve IP integration issues including floor-plan, functional and DFT simulations, timing closure, signal & power integrity with package/board, etc.
• Conduct design integration reviews on customers’ major SoC milestones through tape-out
• Help customer bring up high speed Serdes IPs on customer’s SOC silicon, support customer silicon debug, and improve Serdes performance;
• Provide critical feedback to R&D team on product issues, performance and feature improvement, and drive future specifications for advanced high-speed serial links
• Generate technical specifications, datasheets, and application notes of Serdes IP product
• Key contributor to R&D team to define and develop high speed SerDes IP product specifications

Position Requirements:              

• M.S. Electrical/Computer Engineering (or similar degree)
• 5+ years of relevant experience working with high-speed SerDes and PHYs
• Familiar with high-speed Serdes and serial link architecture, circuit blocks, and performance matrix
• Familiar with SOC full chip integration design flows and issues, especially on mixed signal PHY integration
• Strong ability to analyze and resolve IP integration issues related to RTL, physical, or CAD tools
• Knowledge and experience with SOC design tools such as Digital and Analog simulations, a static timing analysis, physical verification, DFT requirement and methodology, etc.
• Knowledge and experience with advanced process technology nodes (7nm and below) a plus
• Proficient in automation scripting tools like Perl or others
• Hands on post-silicon experience with high speed Serdes bring-up, debug, and system level testing highly preferred
• Excellent written and verbal communication skills

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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