Principal/ Sr. Principal FPGA Design Engineer

Posted 5 Days Ago
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Rolling Meadows, IL, USA
In-Office
120K-224K Annually
Senior level
Aerospace • Logistics • Security • Software • Cybersecurity
The Role
Design, implement, verify, and optimize FPGA-based digital signal processing systems. Responsibilities include architecture, RTL coding (VHDL/Verilog), HLS, testbench development, simulation, synthesis, place-and-route, timing closure, and hardware debugging for high-speed interfaces and embedded SoC architectures.
Summary Generated by Built In
RELOCATION ASSISTANCE: Relocation assistance may be available

CLEARANCE REQUIRED FOR START: No

CLEARANCE TYPE: None

TRAVEL: Yes, 10% of the TimeDescription

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Embark on a career putting innovative, reliable, and agile products and ideas into orbit, and beyond. Northrop Grumman Space Systems has opportunities waiting for you that play a vital role in human space exploration, national defense, and scientific discovery, supporting multiple programs across the universe. With us, you’ll discover a culture of curiosity and collaboration that will have you Defining Possible from the day you start. Our space systems connect and protect millions of people on earth every day, now and for the future. Explore your future and launch your career with Northrop Grumman Space Systems today!

Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission!

We are seeking a talented FPGA Design engineer with signal processing experience to join our growing team in Rolling Meadows, IL.

As an FPGA Design Engineer, you will join our diverse team and be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our digital signal processing products. You will be working with digital subsystem and circuit card designs that utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Intel (Altera), and Microsemi (Actel) and support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Your expertise in digital signal processing, modeling and simulation, and circuit level design and test are desired for this position. 

This position will be filled as a level 3 or level 4.

Basic Qualifications

  • Principal FPGA Design Engineer (Level 3): Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 5 years (or MS and 3+ years, or a PhD) of FPGA/ASIC design experience.
  • Sr. Principal FPGA Design Engineer (Level 4): Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or MS and 6+ years, or PhD +3 years) of FPGA/ASIC design experience.
  • In-depth knowledge of VHDL and/or Verilog
  • -Proficiency in High level synthesis (Xilinx Vivado HLS AND/OR Mentor Catapult HLS) with C++
  • Expertise achieving timing closure on dense FPGA designs
  • Working knowledge of DSP structures and techniques
  • Proficient in Python, C or other scripting languages
  • Extensive experience generating test benches
  • Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis
  • Experience with FPGA simulation tools to verify performance of complex RTL blocks
  • Experience with Xilinx or Intel/Altera FPGA architectures and design tools
  • Soft skills to include: Adaptive, creative, collaborative, comfortable working independently, enjoys solving difficult problems while communicating with all levels of an organization internally and externally
  • Must be a US Citizen with ability to obtain and maintain Top Secret security clearance with SCI

Preferred Qualifications:

  • Current or Active Top Secret with SCI/SAP security clearance
  • Extensive experience implementing Digital Signal or Image Processing algorithms on FPGAs
  • Extensive experience with high-speed interfaces: Ex. AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet, etc.
  • Working knowledge of SDR platforms and architectures
  • Extensive experience developing FPGA algorithms for SoC based architectures
  • Experience developing FPGA/SW interfaces and controls
  • Experience developing and prototyping in MATLAB/Simulink
  • Experience debugging down to the hardware level & experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA
  • Debugging tools.
  • Experience and knowledge developing requirements for FPGA-based products
  • Experience with Electronic Design Automation (EDA) Tools: Mentor Graphics ModelSim/QuestaSim, Synplify, Xilinx ISE/ Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder.
  • Experience working with or developing test benches using SystemVerilog and Universal Verification Methodology (UVM)
  • -Familiarity with revision control, documentation, planning, and review systems similar to GIT/SVN/ClearCase, DOORS, Jira/Rally/ClearQuest

Primary Level Salary Range: $119,600.00 - $179,400.00Secondary Level Salary Range: $149,300.00 - $223,900.00

The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.

Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering or similar (MS/PhD alternatives noted)
  • Minimum FPGA/ASIC design experience (Level 3: 5+ years or MS+3+/PhD; Level 4: 8+ years or MS+6+/PhD+3+)
  • In-depth knowledge of VHDL and/or Verilog
  • Proficiency in High Level Synthesis (Xilinx Vivado HLS and/or Mentor Catapult HLS) with C++
  • Expertise achieving timing closure on dense FPGA designs
  • Working knowledge of DSP structures and techniques
  • Proficient in Python, C or other scripting languages
  • Extensive experience generating test benches and using FPGA simulation tools
  • Proficient in full FPGA design flow: RTL/gate-level simulation, synthesis, place and route, static timing analysis, power analysis
  • Experience with Xilinx or Intel/Altera FPGA architectures and tools
  • Must be a U.S. citizen able to obtain and maintain Top Secret security clearance with SCI
  • Adaptive, creative, collaborative, able to work independently and communicate across organization levels (soft skills)
  • Experience implementing digital signal or image processing algorithms on FPGAs
  • Experience with high-speed interfaces (AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet)
  • Working knowledge of SDR platforms and architectures
  • Experience developing FPGA algorithms for SoC-based architectures and FPGA/SW interfaces
  • Experience/prototyping in MATLAB/Simulink
  • Experience debugging to hardware level using signal generators, logic analyzers, oscilloscopes, and embedded FPGA debugging tools
  • Experience with EDA tools: ModelSim/QuestaSim, Synplify, Xilinx ISE/Vivado, Intel Quartus, Altera SOPC Builder/Qsys, DSP Builder
  • Experience with SystemVerilog and UVM testbenches
  • Familiarity with revision control and tracking tools (GIT/SVN/ClearCase, DOORS, Jira/Rally/ClearQuest)
  • Current or active Top Secret with SCI/SAP security clearance

Northrop Grumman Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Northrop Grumman and has not been reviewed or approved by Northrop Grumman.

  • Retirement Support 401(k) matching is considered strong, with additional defined-benefit coverage for certain cohorts and options like catch-up contributions. Retirement programs are repeatedly highlighted as a core strength of the total rewards.
  • Leave & Time Off Breadth PTO, company-paid holidays, and compressed work schedules (such as 9/80) provide meaningful time away and flexibility. These scheduling options are cited as a major quality-of-life benefit across many locations.
  • Parental & Family Support Paid parental leave alongside caregiver leave, adoption assistance, and back-up care supports a range of family needs. These programs have been expanded recently, signaling continued investment in family support.

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The Company
HQ: Charlotte, North Carolina
85,636 Employees

What We Do

We are a close-knit community of big thinkers collaborating to keep the world safe. Our passion, creativity and expertise bring next-level technology solutions to life in autonomous systems, cyber, C4ISR, strike, space, and logistics and modernization for our customers around the globe. On the Northrop Grumman team, you’ll join our pursuit of excellence immersed in a dynamic culture of innovation and respect. Your unique perspective will help achieve our shared vision for the future of global security. Every step of the way, you'll be supported by world-class training, employee resource groups and a comprehensive benefits package that enables greater health and happiness for you and your family. Worldwide and across disciplines, we’re challenging what’s possible for technology to protect people and places from undersea to outer space and into cyberspace. And we see the impact of our performance every day. We are Northrop Grumman, and we work on what matters—now, you too can make a difference. Explore opportunities in engineering, IT, manufacturing, business management, cybersecurity and more with us. Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer.

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