Experience should include:
- Deep understanding of IC layout on advanced node, 16nm or below, geometries.
- Layout techniques for device matching, parasitic optimization, high speed routing, electromigration and power planning.
- Expert at custom/analog IC physical implementation and automation.
- A good understanding of parasitic RC delay, signal integrity and EMIR.
- Layout dependent effects’ impact on circuit performance.
- Techniques to mitigate verification challenges on leading foundry flows.
- Chip planning and block implementation flows.
- CAD experience with setting up Analog layout tools, scripting (SKILL, TCL, UNIX), PDK configuration.
Responsibilities will include:
- Collaborating with other engineers within and external to the team
- Technical lead on modules within projects, working with other team members.
- Assisting in scoping customer projects and participating in customer presentations.
- Creating advanced node physical design methodologies including databases and documentation for delivery to the customer.
- Collaborating with the Cadence R&D teams to help develop the layout editing and verification tools.
- Understanding customer’s analog layout implementation challenges, especially at lower nodes, guiding the customer in terms of methodology and flows to improve their productivity, resolve critical tool issues.
- Conducting technical presentations, technical training, and product demonstrations to customers, including development of customized presentations as required.
- Supporting technical evaluations/benchmarks to deliver Cadence solutions.
- Developing an understanding of the customer's needs and of the competition's technology to create solutions that best meet our customer needs.
- Strong vocabulary, communication, organizational, planning, and presentation skills are essential.
- Ability to work independently and productively with high quality output and results in a fast paced and dynamic environment.
- Must be open to personal development and growth to meet the evolving demands of the EDA industry.
- Some travel will be required and necessary.
Education Requirements:
BS/MS in Electrical, Computer, or other Engineering discipline
Experience Requirements:
10 or more years of experience
The annual salary range for Washington is $113,400 to $210,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.









