Altera, a leader in programmable solutions from cloud to edge, delivers cutting-edge FPGA, CPLD, and IP technologies. We are driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure. Our mission is to empower engineers to design and deploy advanced systems with unmatched flexibility and performance.
We are seeking a talented Logic Design Engineer to develop and optimize mixed-signal and high-speed IPs for integration into full-chip designs.
Key Responsibilities:
1. Participate in design development tasks throughout the IP development flow.
2. Develops the logic design, register transfer level (RTL) coding, and simulation for an IP.
3. Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.
4. Applies various strategies, tools, and methods to write RTL and optimize the logic to quality the design to meet the IP release requirement.
5. Involve in design example creation, simulation example creation, IP integration and release process.
6. Involve in IP design example brings up on hardware, hardware verification and failure debugging.
Qualifications:1. 15+ years' experience with bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field.
2. Experience in System Verilog, VCS/Synopsys simulators, Lint and Synthesis
3. Experience in programming with C/C++/Perl/Python/TCL/Unix Shell script
4. Experience in FPGA design and programming is a plus.
5. Experience in RTL validation is a plus.
6. Ability to work with different teams, good communication and problem-solving skills.
Job Type: RegularShift:Shift 1 (India)Primary Location:New Delhi, India (Remote)Additional Locations:Bengaluru, Karnataka, IndiaPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Skills Required
- 15+ years of experience in electrical engineering or related field
- Experience in System Verilog, VCS, and Synopsys simulators
- Experience in programming with C/C++/Perl/Python/TCL/Unix Shell script
- FPGA design and programming experience
- Ability to work with different teams and good communication skills
Altera (altera.com) Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Altera (altera.com) and has not been reviewed or approved by Altera (altera.com).
-
Retirement Support — Feedback suggests retirement programs are robust, with offerings such as a 401(k) and a pension. This breadth supports long-term financial security.
-
Leave & Time Off Breadth — Feedback suggests time-off policies are generous, including PTO, paid sick days, and paid holidays. Wellness initiatives like gym memberships further support balance.
-
Parental & Family Support — Feedback suggests parental leave is generous. Family-building support, including fertility benefits and adoption reimbursement, is highlighted as part of the package.
Altera (altera.com) Insights
What We Do
Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.
