Principal IC SoC Integration and Design Engineer

Posted 14 Days Ago
Be an Early Applicant
3 Locations
In-Office
129K-207K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
The Role
Lead SoC architecture and IP integration for AI and storage chips. Drive design quality via simulation, synthesis, formal verification, and timing/physical optimization. Collaborate cross-functionally, consult layout/DFT, and produce SoC release collateral and specifications.
Summary Generated by Built In

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Job Description:

The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art SoC development to meet customer requirements for AI and storage chips.

This is an exciting opportunity to develop new ideas, design the next generation of leading-edge products, and work on the most advanced technologies in the industry.

Responsibilities:

  • Participate in defining the overall SOC architecture and integrating IP

  • Ensure quality design through detailed design analysis using leading edge tools

  • Lead the extended team to support simulation, synthesis, formal verification, constraint definition, and validation of design

  • Collaborate with Internal and External teams to enable customer success

  • Refine solution by consulting with layout and DFT engineers to optimize area, performance and yield

  • Generate collateral to support an SoC release including design specifications

Skills and Experience:

  • Experience with SOC architecture using AMBA interconnect, multiple processors and a variety of IO interfaces from basic UART to high speed DRAM with multiple lanes of high speed SERDES

  • Excellent communication and cross-functional collaboration skills + usage of cloud based documentation

  • Ability to analyze complex trade-offs and make data-driven decisions

  • Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog

  • Strong understanding of physical implementation and timing closure with process variation

  • Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support.

Education/Experience:

  • Bachelors in Engineering (EE, CE, or CS preferred) and 12+ years of related experience; OR Masters degree in Engineering and 10+ years of related experience.

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $129,400 - $207,000

 

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • Experience with SoC architecture using AMBA interconnect, multiple processors, and various I/O interfaces (UART to high-speed DRAM and multi-lane SERDES).
  • Demonstrated expertise in HDL languages: Verilog, VHDL, and SystemVerilog.
  • Strong understanding of physical implementation and timing closure including process variation.
  • Ability to lead extended teams supporting simulation, synthesis, formal verification, constraint definition, and validation.
  • Excellent communication and cross-functional collaboration skills and familiarity with cloud-based documentation.
  • Ability to analyze complex trade-offs and make data-driven decisions.
  • Bachelor's in Engineering (EE, CE, or CS) with 12+ years related experience, or Master's in Engineering with 10+ years related experience.
  • Legal authorization to work in the US; employer does not sponsor immigration.

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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