Principal FPGA / RTL Design Engineer - Signal Processing

Company Overview

At Motorola Solutions, we believe that everything starts with our people. We’re a global close-knit community, united by the relentless pursuit to help keep people safer everywhere. We build and connect technologies to help protect people, property and places. Our solutions foster the collaboration that’s critical for safer communities, safer schools, safer hospitals, safer businesses, and ultimately, safer nations. Connect with a career that matters, and help us build a safer future.

Department OverviewSilvus Technologies was acquired by Motorola Solutions in 2025, and is now part of its ecosystem of safety and security technologies.

With deep roots in DARPA research, Silvus Technologies develops world-class advanced communications technologies that are reshaping the tactical communications landscape. From pure line-of-sight to extreme non-line-of-sight, Silvus radios form a self-healing, self-forming mesh network, enabling secure and reliable connectivity, including video and high-bandwidth data.
Job Description

THE OPPORTUNITY

Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who will report to the Senior Engineering Director in Irvine and work closely with the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment.  FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D.  These are exciting projects aimed at addressing challenging real-world communication needs. 

This Principal FPGA / RTL Design Engineer is 100% onsite, Monday through Friday, at Silvus Technologies’ Engineering and R&D Office in Irvine, CA, near the vibrant Irvine Spectrum.

The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.

ROLE AND RESPONSIBILITIES

• Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks.
• RTL coding, simulation, and test bench development.
• FPGA synthesis and timing closure.
• Hardware verification and troubleshooting; familiarity with logic analyzers.
• Provide support to the RF and Software Engineering teams.

REQUIRED QUALIFICATIONS

• Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
• Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields.
• Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs.
• Deep knowledge of RTL design fundamentals using Verilog and System-Verilog.
• Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs.
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
• Must be a U.S. Citizen due to clients under U.S. government contracts.
• All employment is contingent upon the successful clearance of a background check and drug test.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES

• M.S. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant fields.
• Basic MATLAB skills.
• Solid knowledge and understanding of scripting languages such as Perl and Python.
• Strong communication and presentation skills.
• Experience with wireless communication systems on FPGA or ASIC designs.

Basic Requirements

• Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
• Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields.
• Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs.
• Deep knowledge of RTL design fundamentals using Verilog and System-Verilog.
• Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs.
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
• Must be a U.S. Citizen due to clients under U.S. government contracts.

Travel RequirementsUnder 10%
Relocation ProvidedDomestic
Position TypeExperienced
Referral Payment PlanYes

Our U.S. Benefits include:

• Incentive Bonus Plans

• Medical, Dental, Vision benefits

• 401K with Company Match

• 10 Paid Holidays

• Generous Paid Time Off Packages

• Employee Stock Purchase Plan

• Paid Parental & Family Leave

• and more!

EEO Statement

Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally-protected characteristic. 

We are proud of our people-first and community-focused culture, empowering every Motorolan to be their most authentic self and to do their best work to deliver on the promise of a safer world. If you’d like to join our team but feel that you don’t quite meet all of the preferred skills, we’d still love to hear why you think you’d be a great addition to our team.

We’re committed to providing an inclusive and accessible recruiting experience for candidates with disabilities, or other physical or mental health conditions. To request an accommodation, please complete this Reasonable Accommodations Form so we can assist you.