Principal Engineer, RTL Design

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As a Digital IC Design Principal Engineer with Marvell, you’ll be a member of the NSX Switch business group.
This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell.

What You Can Expect

• As a Principal Design Engineer, you will lead micro-architecture and RTL development and HW/SW co-design efforts working across multi-functional teams, in developing state-of-the-art designs for the upcoming networking chips.
• Additional responsibilities will include, but not be limited to:
• Responsible for micro-architecture design and development of some of the critical IPs involved in networking chips.
• Working with Architects and Verification engineers to deliver and develop complex, high-performance and timing-critical designs through all aspects of the SoC front-end design flow (incl. timing closure and power optimization)

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience.
• Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.
• Strong understanding of SoC architecture, processor cores, memory and peripheral interfaces through hands on prior experience.
• Extensive experience in Verilog/VHDL, Spyglass and Quality checks of the implemented RTL for LINT, CDC.
• Hands on experience in interpretive language such as Perl/Python.
• Proven track record of delivering production-quality designs on aggressive development schedules.
• Domain expertise in Ethernet packet processing, scheduler is a plus.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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