Principal Engineer- Digital Design

Posted 2 Days Ago
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Bengaluru, Bengaluru Urban, Karnataka, IND
In-Office
Expert/Leader
3D Printing
The Role
Lead microarchitecture, RTL design, and delivery of UA Link Switch SoCs. Define switching and interconnect architectures, coordinate cross-functional teams, drive silicon bring-up, optimize performance/power/area, and mentor senior engineers.
Summary Generated by Built In
Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

Job Description

Job Summary:

We are seeking an experienced Principal Engineer / Senior Manager - Digital Design to lead the micro-architecture, design, and execution of next-generation UA Link Switch solutions within the Memory Interface Division (MID). The ideal candidate will bring deep expertise in high-speed digital system design and SoC development, with a proven track record delivering complex silicon products from architecture through production. 

This role requires strong technical leadership in defining and implementing scalable switching and interconnect architectures that enable high-bandwidth, low-latency connectivity for AI, HPC, and memory-centric systems.

Key Responsibilities:

  • Lead digital architecture and design activities for UA Link Switch products. 
  • Define and drive microarchitecture, RTL design, integration, and performance optimization of high-speed switching fabrics and interconnect subsystems. 
  • Collaborate with architecture, verification, firmware, physical design, signal integrity, and system teams to ensure successful product execution. 
  • Drive end-to-end development from requirements definition through silicon bring-up and product qualification. 
  • Provide technical leadership across multiple engineering teams and mentor senior engineers. 
  • Analyze performance, power, area, and scalability trade-offs to meet aggressive product goals. 
  • Participate in architectural reviews, design audits, and technical roadmap planning. 
  • Work closely with ecosystem and standards teams to align product implementation with evolving industry standards. 

Qualifications

  • Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or related discipline. 
  • 15+ years of experience in digital ASIC/SoC development. 
  • Strong experience in one or more of the following areas:  
  1. High-speed digital design 
  2. SoC architecture and integration 
  3. Switching fabric design 
  4. Network-on-Chip (NoC) 
  5. High-speed interconnects 
  6. Memory subsystem design 
  7. Microcontroller-based systems 
  8. High-bandwidth data movement architectures 
  • Deep understanding of RTL design using Verilog/SystemVerilog. 
  • Experience with modern ASIC development flows including synthesis, STA, low-power methodologies, and silicon bring-up. 
  • Strong debugging and performance analysis skills. 
  • Demonstrated ability to lead complex technical programs and influence cross-functional teams. 

Preferred Qualifications:

  • Prior experience in: High-speed SerDes-based systems, Switching fabrics and packet processing architectures, Memory interface technologies, AI/HPC interconnect solutions, PCIe, CXL, Ethernet, UCIe, or related high-speed protocols. 
  • Experience developing large-scale SoCs for networking, compute, storage, or memory applications. 
  • Understanding of system-level architecture and board-level considerations for high-speed designs. 
  • Experience leading geographically distributed engineering teams. 
  • Strong communication and stakeholder management skills. 

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Skills Required

  • Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or related discipline
  • 15+ years of experience in digital ASIC/SoC development
  • High-speed digital design experience
  • SoC architecture and integration experience
  • Switching fabric design experience
  • Network-on-Chip (NoC) experience
  • High-speed interconnects experience
  • Memory subsystem design experience
  • Microcontroller-based systems experience
  • Experience with RTL design using Verilog/SystemVerilog
  • Experience with modern ASIC development flows including synthesis, STA, low-power methodologies, and silicon bring-up
  • Strong debugging and performance analysis skills
  • Demonstrated ability to lead complex technical programs and influence cross-functional teams
  • Prior experience in high-speed SerDes-based systems, packet processing architectures, memory interface technologies, AI/HPC interconnects, PCIe, CXL, Ethernet, or UCIe
  • Experience developing large-scale SoCs for networking, compute, storage, or memory applications
  • Understanding of system-level architecture and board-level considerations for high-speed designs
  • Experience leading geographically distributed engineering teams
  • Strong communication and stakeholder management skills

Renesas Electronics Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.

  • Fair & Transparent Compensation Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
  • Healthcare Strength Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
  • Leave & Time Off Breadth Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.

Renesas Electronics Insights

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The Company
HQ: Tokyo
10,040 Employees

What We Do

We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.

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