Principal Engineer- Design Implementation

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Job Description:

As part of the Microcontroller (MCU) SoC Design group, the successful candidate will be responsible for Design Implementation (Synthesis/STA/Timing closure) of 32-bit microcontrollers. The role will include driving and optimizing synthesis, power optimization, static timing analysis, and logic verification using an industry-leading SoC design flow. It will require a proactive candidate with a proven record of success in delivering leading edge SoC designs. The candidate is required to drive and enhance Synthesis, Static Timing, and Power Optimization methodologies for the MCU silicon design group.

Duties and responsibilities include:

• Develop timing constraints, drive SoC timing budgets, power optimization, formal verification, timing closure and other sign-off activities.

• Drive low power implementation and optimization methodologies using UPF/CPF

• Work closely with digital, analog, and physical design teams to optimize for performance, power, and area.

Requirements/Qualifications:

• Bachelor’s degree in electrical engineering with at least 10+ years of experience in ASIC implementation activities such as synthesis and STA.

• Extensive experience in RTL2Netlist implementation flows

• Strong knowledge in Cadence & Synopsys tools for synthesis, static timing analysis and other activities

• Strong scripting skills in TCL, Perl and other programming languages

• Very good interpersonal skills and able to interact well with other members in the functional teams of the business unit.

• Good communication skills.

Travel Time:

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