The Role
Design, develop, verify, synthesize, and validate complex RTL for FPGA/ASIC/SoC products. Lead functional verification, timing and area optimization, debug across RTL/gate/silicon, collaborate with firmware, physical design, and verification, and support post-silicon bring-up.
Summary Generated by Built In
An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the full design cycle—from specification and RTL design to verification, synthesis, and silicon validation.Key Responsibilities
- Design and develop RTL (Register Transfer Level) code using Verilog/SystemVerilog/VHDL
- Architect and implement complex digital blocks and subsystems
- Perform functional verification using simulation tools and methodologies (UVM/OVM)
- Develop and execute testbenches and validation plans
- Perform logic synthesis, timing analysis, and area optimization
- Debug and troubleshoot design issues at RTL, gate, and silicon levels
- Collaborate with verification, physical design, and firmware teams
- Ensure designs meet power, performance, and area (PPA) targets
- Participate in design reviews, code reviews, and technical discussions
- Work with EDA tools for design implementation and validation
- Support post-silicon validation and bring-up activities
- Strong proficiency in:
- Verilog / SystemVerilog / VHDL
- Experience with:
- RTL design and simulation tools (ModelSim, VCS, Xcelium)
- Synthesis tools (Design Compiler, Genus)
- Static Timing Analysis (PrimeTime)
- Understanding of:
- Digital logic design concepts
- FSMs, pipelining, clock domain crossing (CDC)
- Low-power design techniques
- Knowledge of:
- FPGA/ASIC design flow
- Bus protocols (AXI, AHB, APB)
- Experience in debugging using:
- Waveform tools (Verdi, SimVision)
- Experience with UVM-based verification methodology
- Familiarity with DFT (Design for Testability) concepts
- Exposure to scripting languages like Python, Perl, or TCL
- Knowledge of hardware-software co-design
- Experience in high-speed interfaces or SoC design
- Typically 10+ years of experience in digital design or ASIC/FPGA development
- Proven track record of successful tape-outs or product deliveries
- Bachelor’s or Master’s degree in:
- Electronics Engineering
- Electrical Engineering
- VLSI Design
- Computer Engineering
- Strong problem-solving and debugging abilities
- Excellent communication and teamwork skills
- Ability to work in fast-paced, deadline-driven environments
- Attention to detail and quality-focused mindset
More information about NXP in India...
#LI-29f4Skills Required
- Verilog / SystemVerilog / VHDL
- RTL design and simulation tools (ModelSim, VCS, Xcelium)
- Synthesis tools (Design Compiler, Genus)
- Static Timing Analysis (PrimeTime)
- Digital logic design concepts (FSMs, pipelining, CDC)
- Low-power design techniques
- FPGA/ASIC design flow
- Bus protocols (AXI, AHB, APB)
- Waveform/debug tools (Verdi, SimVision)
- 10+ years of digital design or ASIC/FPGA development experience
- Proven track record of tape-outs or product deliveries
- Bachelor's or Master's degree in Electronics/Electrical/VLSI/Computer Engineering
- Strong problem-solving, debugging, communication, and teamwork skills
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The Company
What We Do
NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 34,500 employees in more than 30 countries and posted revenue of $13.21 billion in 2022. Find out more at www.nxp.com. Privacy Policy: https://www.nxp.com/company/about-nxp/privacy-policy-for-social-media-pages:PRIVACY-POLICY-SOCIAL-MEDIA
