Principal DFT Engineer

Posted 3 Days Ago
Be an Early Applicant
2 Locations
In-Office
180K-255K Annually
Expert/Leader
Artificial Intelligence • Hardware • Machine Learning • Natural Language Processing • Software • Generative AI
SambaNova is the #1 platform for business AI.
The Role
Design and implement block- and SoC-level DFT architectures for complex AI accelerator chips. Develop ATPG, MBIST, scan, JTAG, IEEE 1500, and IJTAG infrastructure; automate insertion, pattern generation, coverage analysis, and debug; support DFT timing closure, ATE deployment, silicon bring-up, diagnosis, failure localization, yield analysis, and manufacturing test optimization.
Summary Generated by Built In

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

About the role

Sambanova is looking for a talented and motivated Principal Design for Test (DFT) Engineer to help us build state-of-the-art RDU chips for machine learning and artificial intelligence. We are looking for a highly hands-on engineer who will be responsible for DFT architecture and implementation, verification, ATPG, MBIST and silicon bring-up for complex high-performance chips

Responsibilities

Your responsibilities will include:

  • Define & implement block-level and SoC-level DFT architecture for large, hierarchical SoCs
  • Develop and maintain ATPG flows for stuck-at,  at-speed and advanced fault models.
  • Develop scripts and automation for DFT insertion, ATPG, coverage analysis, pattern generation, and debug.
  • Develop and maintain JTAG, IEEE 1500, and IEEE 1687/IJTAG infrastructure for internal test and debug access.
  • Generate production-quality ATPG and MBIST patterns and support deployment to ATE.
  • Work closely with STA and Physical Design teams on DFT timing closure
  • Support silicon diagnosis, failure localization, yield analysis, and manufacturing test optimization.
Required Qualifications
  • B.S. in computer science, computer engineering, or related field
  • 10+ years relevant industry experience
  • Deep understanding of scan insertion, scan compression, ATPG, MBIST, JTAG, and hierarchical DFT
  • Hands-on experience with Siemens Tessent tool flow (preferred) or equivalent industry standard DFT tools
  • Familiarity with cell-aware ATPG, small-delay defects, IEEE 1500, IEEE 1687/IJTAG, and low-power DFT is highly desirable
  • Strong understanding of advanced ATPG, silicon diagnosis, and failure localization methodologies
  • Experience with STA constraints & analysis for DFT modes & SDF simulations
  • Working knowledge of Verilog/System-Verilog simulators & waveform debugging
Preferred Qualifications
  • Experience with ATE pattern deployment and silicon bring-up 
  • Experience with multi-die/chiplet DFT, known-good-die test, or die-to-die interface testing
  • Experience with large compute, AI accelerator, or HPC SoCs

Base Salary Range:

Base Pay Range
$180,000$255,000 USD

Submission Guidelines
Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified. 

EEO Policy
SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.

Benefits Summary for US-Based, Full-Time Employment Positions
SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.

Skills Required

  • Bachelor's degree in computer science, computer engineering, or a related field
  • 10+ years of relevant industry experience
  • Deep understanding of scan insertion, scan compression, ATPG, MBIST, JTAG, and hierarchical DFT
  • Hands-on experience with Siemens Tessent or equivalent industry-standard DFT tools
  • Familiarity with cell-aware ATPG, small-delay defects, IEEE 1500, IEEE 1687/IJTAG, and low-power DFT
  • Strong understanding of advanced ATPG, silicon diagnosis, and failure localization methodologies
  • Experience with STA constraints and analysis for DFT modes and SDF simulations
  • Working knowledge of Verilog/SystemVerilog simulators and waveform debugging
  • Experience with ATE pattern deployment and silicon bring-up
  • Experience with multi-die/chiplet DFT, known-good-die test, or die-to-die interface testing
  • Experience with large compute, AI accelerator, or HPC SoCs
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The Company
HQ: Palo Alto, CA
500 Employees
Year Founded: 2017

What We Do

AI is changing the world and at SambaNova, we believe that you don’t need unlimited resources to take advantage of the most advanced, valuable AI capabilities - capabilities that are helping organizations explore the universe, find cures for cancer, and giving companies access to insights that provide a competitive edge. We deliver the world’s fastest and only complete AI solution for enterprises and governments with world-record inference performance and accuracy. Powered by the SambaNova SN40L Reconfigurable Dataflow Unit (RDU), organizations can build a technology backbone for the next decade of AI innovation with SambaNova Suite. Our fully integrated hardware-software system, DataScale®, enables organizations to train, fine-tune, and deploy the most demanding AI workloads using the largest and most challenging models. Most recently, with the launch of our newest offering, SambaNova Cloud, developers can supercharge AI-powered applications on Llama 3.2 models. SambaNova was founded in 2017 in Palo Alto, California, by a group of industry luminaries, business leaders, and world-class innovators who understand AI. Today, we’ve built an incredibly smart and motivated team dedicated to making a lasting impact on the industry and equipping our customers to thrive in the new era of AI.

Why Work With Us

As a talent first company, we aim to hire the greatest and most innovative minds in the industry- driving the next generation of AI computing where no barrier is too high and the possibilities are truly limitless. We encourage our peers to take risks and take the initiative to make a lasting impact on the AI and ML industries.

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