At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
Kandou’s architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future.
Department: Product Development and Manufacturing
Location: Taiwan
Role Summary
The Principal Development Engineer owns the electrical and mechanical optimization of connector interfaces, cable-to-connector assemblies, and cable-to-PCB interfaces for Kandou's high-speed interconnect products. This individual drives interconnect architecture from early concept through electromagnetic simulation (HFSS), Proof-of-Life (PoL) validation, and lab measurement, partnering closely with silicon, systems, mechanical, and customer-facing teams to deliver signal-integrity-optimized, manufacturable interconnect solutions.
Responsibility and Authority
Own the end-to-end optimization of connector, cable-to-connector, and cable-to-PCB interfaces for Kandou's interconnect products.
Lead conceptual design and architecture definition for new connector and cable interconnect solutions, evaluating electrical, mechanical, and manufacturability trade-offs.
Build and run HFSS simulation models to characterize and optimize connector and cable interface electrical performance.
Define and execute Proof-of-Life (PoL) studies to validate design intent prior to full qualification.
Perform and oversee lab measurement and characterization (VNA, TDR, oscilloscope) to validate simulation predictions and debug performance issues.
Drive design reviews and provide technical recommendations to engineering leadership, product management, and customers on interconnect design decisions.
Collaborate cross-functionally with signal integrity, mechanical, systems, manufacturing, and customer teams to align interconnect designs with overall product requirements.
Interface with connector and cable suppliers on design-in, sampling, qualification, and manufacturability.
Mentor junior engineers on simulation methodology, measurement techniques, and interconnect design best practices.
Individual responsibilities for this role are defined by Kandou's executive team on a project-by-project basis and may vary from this job description.
Required Experience
10+ years of experience in high-speed interconnect, connector, or cable assembly development within the semiconductor, networking, or computing industry.
Proven track record of optimizing connector, cable-to-connector, and cable-to-PCB interfaces for high-speed differential signaling (e.g., PCIe, SerDes, 112G+/224G electrical interfaces).
Extensive hands-on experience with Ansys HFSS (or equivalent 3D electromagnetic field solvers) for connector, cable, and interconnect modeling.
Demonstrated experience leading conceptual design and architecture definition of new connector and cable interconnect systems, from early feasibility through detailed design.
Experience planning and executing Proof-of-Life (PoL) studies to validate first-pass electrical and mechanical performance of new interconnect designs.
Strong lab measurement background, including VNA, TDR, and oscilloscope-based characterization of connectors, cables, and interconnect channels.
Experience working cross-functionally with mechanical, signal integrity, package, systems, manufacturing, and customer-facing teams to align interconnect designs with product and manufacturing requirements.
Experience engaging directly with connector and cable vendors/suppliers on design-in, qualification, and manufacturability trade-offs.
Required Skills
Deep understanding of high-speed signal integrity fundamentals: S-parameters, transmission line theory, impedance control, crosstalk, and insertion/return loss.
Expert-level proficiency in HFSS for 3D full-wave electromagnetic simulation of connectors, cables, and PCB launch structures.
Strong analytical skills to correlate simulation results with lab measurement data and resolve discrepancies.
Ability to translate system-level electrical requirements into conceptual connector/cable interface designs and specifications.
Excellent cross-functional collaboration and communication skills, with the ability to influence design trade-offs across engineering disciplines.
Strong documentation skills for design reviews, test reports, and specification development.
Ability to manage multiple concurrent development programs and prioritize effectively under schedule pressure.
Strong presentation skills, with the ability to clearly convey technical findings, trade-offs, and recommendations to engineering leadership, cross-functional teams, and customers.
Working knowledge of Lean Product Development (Lean PD) principles, applying them to streamline design iteration, reduce waste, and accelerate time-to-market.
Strong written and verbal English communication skills, required.
Mandarin language proficiency is a nice-to-have, given engagement with suppliers and customers in Mandarin-speaking regions.
Ability and willingness to travel internationally to support supplier reviews, lab bring-ups, and customer engagements.
Required Competencies – Education
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or an equivalent field.
Advanced coursework or demonstrated expertise in electromagnetics, RF/microwave engineering, or high-speed signal integrity is desired.
Skills Required
- 10+ years of experience in high-speed interconnect, connector, or cable assembly development within the semiconductor, networking, or computing industry
- Experience optimizing connector, cable-to-connector, and cable-to-PCB interfaces for high-speed differential signaling, including PCIe, SerDes, or 112G+/224G electrical interfaces
- Extensive hands-on experience with Ansys HFSS or equivalent 3D electromagnetic field solvers
- Experience leading conceptual design and architecture definition of connector and cable interconnect systems
- Experience planning and executing Proof-of-Life studies
- Strong laboratory measurement experience using VNA, TDR, and oscilloscopes
- Experience collaborating with mechanical, signal integrity, package, systems, manufacturing, and customer-facing teams
- Experience working directly with connector and cable vendors or suppliers on design-in, qualification, and manufacturability
- Deep understanding of S-parameters, transmission line theory, impedance control, crosstalk, insertion loss, and return loss
- Expert-level proficiency in HFSS for full-wave electromagnetic simulation
- Strong analytical skills for correlating simulation results with laboratory measurements
- Ability to translate system-level electrical requirements into connector and cable interface designs and specifications
- Cross-functional collaboration and communication skills
- Strong documentation skills for design reviews, test reports, and specifications
- Ability to manage multiple concurrent development programs and prioritize under schedule pressure
- Strong presentation skills for communicating technical findings and recommendations
- Working knowledge of Lean Product Development principles
- Strong written and verbal English communication skills
- Willingness to travel internationally for supplier reviews, lab bring-ups, and customer engagements
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or an equivalent field
- Advanced coursework or demonstrated expertise in electromagnetics, RF/microwave engineering, or high-speed signal integrity
- Mandarin language proficiency
What We Do
Kandou AI is a fabless semiconductor company developing high-speed connectivity for AI infrastructure. Its patented Copper MIMO, also known as Chord Signaling, sends correlated signals at data-processing speeds of 448 Gbps and beyond, providing an alternative to optical interconnects. The company’s technology targets AI data-movement bottlenecks and memory-wall constraints, while its platforms emphasize improved efficiency, lower power and cost, and scalability.







