Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Principal Analog Design Engineer (SERDES)
Location: Cork
Reports to: Design Engineering Group Director
Job Overview:
The Principal Analog Design Engineer will take a Technical Leadership role on the PMA design team as part of a SERDES Product Team located at Cork, Ireland.
Job Responsibilities:
- Design of High Speed SERDES products at data rates up to and exceeding 112 Gbps on leading edge technology nodes (e.g. 5nm FinFET CMOS)
- Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications
- Work closely with Physical Design Engineers to design IC circuit blocks and PMA sections
- Participate in technical leadership of the team in the areas of circuit design and SERDES architectures
- Work with global teams (US, west coast and east coast), which work in different time-zones
Job Qualifications:
- Candidate’s background should include a minimum of 7 years of experience in CMOS SERDES or high-speed I/O IC design and development
- BEng, MEng or PhD Qualified
- Working knowledge of a set of common SERDES standards and their electrical requirements
- Must have a thorough understanding of jitter and signal equalization techniques
- Proficient design experience in many of the following SERDES circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators
- Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team environment
Additional Skills/Preferences:
- Cadence tool experience and design experience at >10Gbps and in <40nm technologies
- Lab test experience as part of silicon evaluation is advantageous
- Interest in publishing academic papers and presenting at conferences e.g. ISSCC, JSSC
Additional Information:
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
Travel: >5%
We’re doing work that matters. Help us solve what others can’t.Skills Required
- Minimum 7 years experience in CMOS SERDES or high-speed I/O IC design and development
- BEng, MEng or PhD qualification
- Working knowledge of common SERDES standards and their electrical requirements
- Thorough understanding of jitter and signal equalization techniques
- Proficient design experience in SERDES circuit blocks (Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High-speed Clock Distribution, Bias and Bandgap, Voltage Regulators)
- Excellent problem-solving skills, analog aptitude, strong communication and teamwork abilities
- Cadence tool experience and design experience at >10Gbps and in <40nm technologies
- Lab test experience as part of silicon evaluation
- Interest in publishing academic papers and presenting at conferences (e.g., ISSCC, JSSC)
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
