Responsible for ensuring functional correctness and quality of SoC designs before silicon tape-out, through simulation, emulation, and advanced verification methodologies.
The role involves testbench development, coverage-driven verification, and debug of complex SoC architectures.
Qualifications:
Experience : 5 to 12 years
Key Responsibilities
• Define and develop SoC / subsystem / IP verification plans aligned to architecture specifications
• Build and maintain System Verilog/UVM-based testbenches and verification environments
• Develop constrained-random and directed test scenarios and validation content
• Execute simulation and emulation-based verification to validate functionality, power, and performance
• Perform debug and root-cause analysis of RTL and testbench failures in pre silicon environment
• Analyze and drive functional, code, and assertion coverage closure
• Collaborate with architecture, RTL design, post silicon, and validation teams
• Document verification plans and participate in design/verification reviews
• Continuously improve verification methodology, infrastructure, and automation flows
• Incorporate learning from post silicon validation to enhance future verification coverage
• Good at leveraging AI across verification coding, debugging , quality sign-off requirements.
• Minimum 5 to 12 year of relevant experience in SoC/subsystem/IP level verification
• Qualifications BE or B Tech or M Tech ECE or Computer Science with 5 to 12 years front-end pre-si verification.
Job Type:Experienced HireShift:Shift 1 (India)Primary Location: India, BangaloreAdditional Locations:Business group:Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Skills Required
- 5 to 12 years relevant SoC/subsystem/IP pre-silicon verification experience
- BE/BTech or MTech in ECE or Computer Science
- Build and maintain SystemVerilog/UVM-based testbenches and verification environments
- Define and develop SoC/subsystem/IP verification plans aligned to architecture specifications
- Develop constrained-random and directed test scenarios and validation content
- Execute simulation and emulation-based verification to validate functionality, power, and performance
- Perform debug and root-cause analysis of RTL and testbench failures
- Analyze and drive functional, code, and assertion coverage closure
- Collaborate with architecture, RTL design, post-silicon, and validation teams
- Continuously improve verification methodology, infrastructure, and automation flows
- Experience leveraging AI in verification coding, debugging, and quality sign-off
Intel Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.
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Parental & Family Support — Family-building and caregiving supports are extensive, including fertility coverage, adoption assistance, paid parental leave, childcare and elder care resources, and a structured reintegration for new parents. These benefits are positioned as best-in-class elements of the package.
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Leave & Time Off Breadth — Time off includes generous PTO, a paid sabbatical after extended tenure, and multiple leave types such as family, medical, bereavement, and military. This breadth enables employees to disconnect, recharge, and manage life events.
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Retirement Support — Long-term savings are bolstered by a competitive 401(k) match and access to deferred compensation for eligible levels, alongside stock purchase opportunities. These programs are highlighted as strong tools for financial security.
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