Pre-Si FPGA Platform Development Engineer (Temporary position)

Job Details:

Job Description: 

We are seeking a passionate and driven professional with a strong interest in building emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools.

Please consider that this is a temporary position with a contract length of 2 years.

Responsibilities will include but are not limited to:

• The selected candidate will develop, integrate, test, and debug hardware and software collateral in simulation, emulation, or FPGA models for testing new features. This includes writing directed tests, developing test environments and hybrid emulation environments, and supporting the verification of hardware and software/firmware. This position will also define and develop new capabilities and tools to achieve better verification through improved emulation or FPGA model usability, enabling acceleration of RTL development and improving emulation/FPGA model usability for Pre-Silicon verification, Post-Silicon validation, and software development.
• The ideal candidate will develop improvements to usability by performing RTL validation and debugging of failing RTL tests on the emulation platform. They will interface with and provide guidance to verification teams for optimizing Pre-Silicon verification environments, test suites, and methodologies for emulation efficiency.
• Additionally, they will develop and utilize automation aids, flows, and scripts in support of emulation utilization.
• The candidate will actively participate in SoC and IP bring-up, root cause testbench issues, IP and SoC test cases, and emulator/FPGA environment issues.

The candidate must apply a solid understanding of emulation or FPGA prototyping tools and methodologies, SoC integration, emulation transactors, emulation performance and optimization techniques, RTL simulation, and hybrid emulation environments, including virtual platforms or FPGA/emulation models.

This role requires strong collaboration with design, power and performance, silicon validation, and software teams.

Qualifications:

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position:

• Bachelor's degree in Electrical Engineering, Mechatronics, Computer Science or related field.
• 3+ years of experience in:
  • Digital design: Combinational, Synchronous (state machines), Asynchronous.
  • Computer Architecture and interfaces (USB, UART, SPI, I2C, PCIe, etc.).
  • Hardware Description Languages (Verilog, System Verilog or VHDL).
  • Programming languages (C, C++, Python, Perl, Java).
  • FPGA design flow and Linux OS.
  • Intermediate to Advanced English Level.

Must have unrestricted - permanent right to work in Mexico (this position is not eligible for employment-based visa/immigration sponsorship).
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates:

• Master's degree in Electrical Engineering, Mechatronic, Computer Science or Computer Engineering.

• 3+ years of experience in
  • Software firmware or system level development.
  • Development and knowledge of UEFI BIOS firmware using Intel architecture.
  • Experience in debug in Linux, Android and/or Windows environments.
  • Experience in low level programming system architecture RTL operating systems or device architecture.
  • Detailed knowledge of IP or subsystem architecture such as Power Management Security or RAS.

          

Job Type:Intel Contract Employee

Shift:Shift 1 (Mexico)

Primary Location: Mexico, Guadalajara

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.