Power Management IC Designer

Posted Yesterday
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90503, Torrance, CA, USA
In-Office
110K-135K Annually
Entry level
Hardware
The Role
Design and simulate analog power-management ICs and integrated voltage regulators, including DC-DC converters, power stages, gate drivers, control loops, and protection circuits. Perform PVT, Monte Carlo, and post-layout simulations; analyze device and converter performance; support silicon bring-up, bench characterization, debugging, and simulation-to-measurement correlation. Collaborate with layout, packaging, systems, applications, and test teams throughout product development.
Summary Generated by Built In
Job Purpose

Navitas Semiconductor (Nasdaq: NVTS) is a next-generation power semiconductor leader driving innovation in gallium nitride (GaN) and high-voltage silicon carbide (SiC) technologies. Our products enable faster, more efficient power delivery across AI data centers, high-performance computing, energy and grid infrastructure, and industrial electrification.

With more than 30 years of combined expertise in wide bandgap technologies, GaNFast™ power ICs integrate GaN power, drive, control, sensing, and protection, delivering faster power delivery, higher system density, and greater efficiency. GeneSiC™ high-voltage SiC devices leverage patented trench-assisted planar technology to provide industry-leading voltage capability, efficiency, and reliability for medium-voltage grid and infrastructure applications. 

We are looking for a motivated Power IC Design Engineer to join our Integrated Voltage Regulator (IVR) design team. The engineer will contribute to the design, simulation, verification, and characterization of high-performance power-management ICs and integrated voltage regulators.

This position is ideal for a recent graduate or early-career engineer with a strong foundation in analog circuits, semiconductor devices, and power electronics who is interested in developing expertise in high-frequency DC-DC converters, power stages, control circuits, and integrated power delivery. The engineer will work closely with lead IC designers, layout engineers, package engineers, systems engineers, and applications engineers throughout the full product development cycle, from architecture and circuit design through silicon validation.

Key Responsibilities and Duties
  • Design and simulate analog and power-management circuits for integrated DC-DC converters and IVRs.
  • Support development of synchronous buck converters, power stages, gate drivers, control loops, protection circuits, and supporting analog blocks.
  • Analyze power MOSFET characteristics including RDS(on), gate charge, switching loss, conduction loss, COSS/QOSS, and device figure of merit.
  • Perform schematic-level and post-layout simulations across PVT corners and Monte Carlo conditions.
  • Evaluate converter performance including efficiency, transient response, stability, ripple, switching behavior, and power loss.
  • Support selection and optimization of power devices in BCD/CMOS/GaN technologies.
  • Support extraction and review of post-layout parasitic and evaluate their impact on circuit performance.
  • Assist with silicon bring-up, bench characterization, debugging, and correlation between simulation and measurement.
  • Document design calculations, simulation results, design reviews, and characterization results.
  • Collaborate with package, systems, applications, and test teams to optimize overall IVR performance.
Knowledge Skills Abilities and Other Characteristics
  • Deep knowledge of analog IC design, DC-DC converter architectures, feedback control, gate drivers, and power delivery tradeoffs.
  • Ability to connect IC performance with packaging, thermal limits, manufacturing constraints, and customer system requirements.
  • Ability to build and develop teams, delegate technical ownership, and prioritize resources across concurrent programs.
  • Sound engineering judgment, clear customer and executive communication, and accountability for design quality, schedule, and team development.
QualificationsRequired QualificationsBasic
  • MS degree in Electrical Engineering, Microelectronics, Integrated Circuit Design, or related discipline.
  • Relevant graduate research, IC tape-out experience, internship experience, or university power-management IC projects may substitute for industry experience
  • Strong transistor-level design expertise in DC-DC converters, gate drivers, and analog power management circuits; experience with Cadence Virtuoso or equivalent tools.
Preferred
  • PhD degree with coursework or research in analog, mixed-signal, power-management, or power IC design
  • Experience with IVRs, multiphase converters, buck-boost topologies, LDOs or servers and high-current power delivery applications.
  • Familiarity with Cadence Virtuoso/Spectre or similar IC design tools.
  • Exposure to GaN, BCD, or high-voltage CMOS processes.
  • Familiarity with SIMPLIS, Python automation, mixed-signal interfaces, digital control, and AI-assisted design methods.
  • Experience scaling reusable IP and design processes across multiple products and supporting qualification and industrialization for demanding applications.

Skills Required

  • MS degree in Electrical Engineering, Microelectronics, Integrated Circuit Design, or a related discipline
  • Relevant graduate research, IC tape-out, internship, or university power-management IC project experience may substitute for industry experience
  • Strong transistor-level design expertise in DC-DC converters, gate drivers, and analog power-management circuits
  • Experience with Cadence Virtuoso or equivalent IC design tools
  • PhD with coursework or research in analog, mixed-signal, power-management, or power IC design
  • Experience with IVRs, multiphase converters, buck-boost topologies, LDOs, servers, or high-current power delivery applications
  • Familiarity with Cadence Virtuoso, Spectre, or similar IC design tools
  • Exposure to GaN, BCD, or high-voltage CMOS processes
  • Familiarity with SIMPLIS, Python automation, mixed-signal interfaces, digital control, and AI-assisted design methods
  • Experience scaling reusable IP and design processes across multiple products and supporting qualification and industrialization
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The Company
HQ: El Segundo, CA

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