Physical Design Methodology Engineer

Posted 9 Days Ago
Be an Early Applicant
Burlingame, CA
Senior level
Hardware • Machine Learning • Software
The Role
As a Physical Design Methodology Engineer, you will develop design methodologies and automation scripts for processor IP implementation, collaborate with architecture teams to optimize performance, and perform test chip tape outs across multiple process nodes.
Summary Generated by Built In

Description

Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture. Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads in a wide variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle systems. Unlike other NPUs or neural network accelerators in the industry today that can only accelerate a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C++ DSP and control code.

If making an impact and having a seat at the table is important to you, this is the opportunity for you. Join our small, rapidly-growing team at Quadric to develop supercomputer technology designed for the Edge. In this position, you will be a core member of our team, and will have an opportunity to grow in the company of expert technologists who also happen to be good people you’ll want to spend time with.

What We Value:

Integrity, Humility, Happiness

What We Expect:

Initiative, Collaboration, Completion

Role

As a member of our physical design methodology team you will be tasked with developing physical design methodologies and automation scripts for multiple design configurations across multiple process nodes.

Responsibilities

  • Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes.
  • Preform test chip tape outs as necessitated by architecture innovation.
  • Collaborate with the architecture team to optimize PPA.
Requirements
  • MS or Ph.D. in Electrical Engineering with a minimum of eight years of CPU/GPU/ASIC implementation
  • Proficiency in TCL scripting
  • Proficiency in chip front-end and back-end implementation tools such as Design Compiler, PrimeTime, ICC2 & Fusion Compiler.
  • Experience with 16nm and below process technologies.

Nice to haves:

  • Knowledge of lower power digital design techniques.
  • IP integration experience.
  • Experience in data parallel hardware design for high-performance computing


Benefits
  • 401k, Medical, Dental & Vision coverage
  • Provide competitive salaries and meaningful equity
  • Enable a politics-free community for the brilliant minds who want to make an immediate impact
  • Provide an opportunity for you to build long term career relationships
  • Foster an environment that allows for lasting personal relationships alongside professional ones

Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world’s first supercomputer designed for the real-time needs of edge devices. Quadric aims to empower developers in every industry with superpowers to create tomorrow’s technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21.

Quadric is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, religion, sex, national origin, sexual orientation, age, citizenship, marital status, or disability.

Top Skills

Tcl
The Company
HQ: Burlingame, CA
38 Employees
On-site Workplace
Year Founded: 2017

What We Do

Quadric has built a unified hardware/software architecture optimized for on-device machine learning inference. Only the Quadric GPNPU (general purpose neural processing unit) delivers high ML inference performance while also running C++ code without forcing the developer to artificially partition application code between two or three different kinds of processors. Quadric's GPNPU is a licensable processor IP core that scales from 1 to 64 TOPs and seamlessly intermixes scalar, vector and matrix code.

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