Performance Research Engineer (multiple levels)

Posted 12 Hours Ago
Be an Early Applicant
2 Locations
In-Office
180K-250K Annually
Expert/Leader
Hardware • Manufacturing
The most energy-efficient general purpose processors ever made.
The Role
Research and develop performance optimization techniques, AI-assisted optimization tools, and performance analysis for a novel fabric dataflow processor. Design and run simulator-based experiments, collaborate with architecture and compiler teams to influence ISA and code generation, and integrate optimizations into performance libraries and resource-constrained runtime environments.
Summary Generated by Built In

Efficient is developing the world’s most energy-efficient general-purpose computer processor. Efficient’s patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks. This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years. Our platform’s unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution

About the Role

We are seeking Performance Research Engineers (staff to principal levels) to join our growing team. Efficient’s Performance Research Engineers research new optimization techniques; design new tools for AI assisted optimization and performance analysis;  collaborate with our architecture team on the design of future hardware;  design and perform modeling experiments using our architecture simulator; and collaborate with our world class compiler team, evaluating code-generation quality, suggesting new intrinsics, influencing the ISA, and experimenting with new language extensions.    This is an applied research role, where you will be asked to drive the integration of these new techniques, tools, and language extensions into our existing performance libraries. 

This position is a unique opportunity to work on cutting-edge hardware/software co-design, while making an immediate impact on building the next generation of performance libraries, applications, and hardware used by our customers.

Required Qualifications & Experience
  • Hands-on software development experience working closely with hardware, including exposure to at least two RISC, DSP or GPU platforms.  
  • A  passion for understanding and addressing performance issues that are unique to our Fabric dataflow architecture.
  • Experience with  framework and library design, particularly within resource constrained and realtime environments.
  • Experience with CUDA, HIP and/or other parallel programming models.
  • The ability to lead and work independently.
  • A collaborative spirit, with the ability to work with and influence multiple engineering teams.
  • Demonstrated ability to write, debug, and maintain low-level, C/C++, systems-level code as well as design clean interfaces and modular code.
  • Actively uses AI tools to generate, optimize, and debug code.
  • Familiarity with low-level programming interfaces, e.g. PTX, LLVM IR and/or MLIR. 
  • Experience working with HW simulation environments.
  • Domain expertise in three or more of the following areas:  Linear Algebra, ML, Image Processing, Video Processing, Signal Processing, Audio Processing, SDR, realtime programming, or Robotics.
  • Background in performance profiling, benchmark design, or comparative hardware analysis.
  • Excellent written, verbal, analytical and technical communication skills, with the ability to clearly document complex systems,  lead discussions across teams, as well as the ability to drive consensus across teams.
  • Minimum Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field.   PHD preferred.  Equivalent work experience.
Desired Qualifications & Experience
    • Some experience working on compiler development.
    • Some experience working with high-performing HW architecture teams.

We offer a competitive salary for this role, generally ranging from $180,000 to $250,000, along with meaningful equity and comprehensive benefits. The final compensation package will be based on your experience and location, with some flexibility to ensure we align with the right candidate.

Why Join Efficient?

Efficient offers a competitive compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, and flexibility. We are committed to personal and professional development and strive to grow together as people and as a company.

Skills Required

  • Hands-on software development experience working closely with hardware, including exposure to at least two RISC, DSP, or GPU platforms
  • Experience with framework and library design in resource-constrained and realtime environments
  • Experience with CUDA, HIP and/or other parallel programming models
  • Demonstrated ability to write, debug, and maintain low-level C/C++ systems-level code and design clean interfaces
  • Familiarity with low-level programming interfaces (e.g., PTX, LLVM IR and/or MLIR)
  • Experience working with hardware simulation environments and architecture simulators
  • Domain expertise in three or more: Linear Algebra, ML, Image Processing, Video Processing, Signal Processing, Audio Processing, SDR, realtime programming, or Robotics
  • Background in performance profiling, benchmark design, or comparative hardware analysis
  • Ability to lead, work independently, and collaborate across multiple engineering teams
  • Excellent written, verbal, analytical and technical communication skills
  • Actively uses AI tools to generate, optimize, and debug code
  • Minimum Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or related technical field (PhD preferred; equivalent experience accepted)
  • Some experience working on compiler development
  • Some experience working with high-performing hardware architecture teams
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The Company
HQ: Pittsburgh, PA
49 Employees
Year Founded: 2022

What We Do

Efficient is building the world’s most energy-efficient general-purpose processor by combining ultra-efficient hardware with an intuitive, developer-friendly compiler and software stack that unlocks 10–100× efficiency gains across every part of an application, including AI. Efficient was founded in 2022 to commercialize a breakthrough in efficient computation developed over nearly a decade by a team of world-leading computer architects. Efficient's world-class team has produced two silicon implementations of the Fabric architecture: the Electron E0, a prototype system-on-chip, and the Electron E1, the first silicon product. With Efficient's cutting-edge effcc Compiler and software stack, the Electron E1 processor has been delivered to customers as of mid-2025, ramping to large-scale volume and distribution in 2026. Efficient already has customer traction in areas such as physical AI for infrastructure and automation, space and defense, automotive, and consumer products. Efficient's technology scales from tiny “beyond the edge” devices to large-scale robotics, autonomy, edge cloud, and datacenter applications—enabling widespread adoption across multiple industries and positioning Efficient as the solution to the energy problem across all of computing.

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