Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional DFT engineer to join our DFT team in Bangalore. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.
As a PRINCIPAL ENGINEER, you’ll play a pivotal role in Handling different aspects of DFT for high-speed mixed signal Design, Low coverage debug for Stuck at and Transition, Silicon debug, taking initiative to deploy new flow. Supporting team whenever needed. In this fulltime role, you’ll report directly to our Dir Engineering. Our MIC Design team is dedicated to delivering high quality PMIC silicon, and your contributions will be instrumental in leading project, performing DFT tasks with quality, and delivering high quality patterns for silicon.
Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.
Responsibilities- Full DFT of Mixed Signal design.
- Creating DFT IPs and deployment.
- Debug different failure.
- Low coverage analysis for both Stuck at and At-speed.
- Working closely with cross functional teams to develop and verify DFT’s structures and constraints.
- Work closely with Test Engineering for test program development, Silicon bring up, diagnosis, Yield improvement, Silicon Debug etc.
- Work closely with EDA R&D teams to propose and implement new features.
- Hands on skill for scripting and flow deployment.
- Understanding of MBIST, LBIST.
- BTech /BE/ME/M Tech with 8-12 years of relevant hands-on experience in Design for Test (DFT).
- Clear understanding of key DFT concepts like Scan compression (EDT), Scan Stitching, fault models (stuck-at, delay tests, Small Delay, etc.), EDT, OCC etc.
- Understanding of SOC DFT architecture.
- Basic understanding of DFT for mixed signal designs.
- Understanding of Synthesis, RTL coding, STA.
- Hands on experience with Tessent ATPG tool is preferable.
- Silicon debug skill and sign off.
- Experience in at least one scripting language like PERL, Python, TCL, or Shell is preferred.
- Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals.
- Excellent written and verbal communication skills.
About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.
Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits.
At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.
Skills Required
- BTech, BE, ME, or MTech degree
- 8–12 years of relevant hands-on Design for Test experience
- Understanding of scan compression, EDT, scan stitching, stuck-at faults, delay tests, small-delay tests, and OCC
- Understanding of SoC DFT architecture
- Basic understanding of DFT for mixed-signal designs
- Understanding of synthesis, RTL coding, and static timing analysis
- Silicon debug and sign-off experience
- Hands-on experience with the Tessent ATPG tool
- Experience with at least one scripting language: Perl, Python, Tcl, or Shell
- Strong problem-solving and collaboration skills
- Excellent written and verbal communication skills
What We Do
Dedicated to making data faster and safer, Rambus creates innovative hardware, software and services that drive technology advancements from the data center to the mobile edge. Our architecture licenses, IP cores, chips, software, and services span memory and interfaces, security, and emerging technologies to positively impact the modern world. We collaborate with the industry, partnering with leading chip and system designers, foundries, and service providers. Integrated into tens of billions of devices and systems, our products and technologies power and secure diverse applications, including Big Data, Internet of Things (IoT) security and much more!
