At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
Kandou’s architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future.
Job Title: PCB Layout Engineer
Location: Taipei, Taiwan
Key Responsibilities
Own and execute the PCB layout design for assigned Kandou board products from initial floorplan through to final fabrication and assembly data release.
Translate hardware schematics into high-quality, DFM-compliant PCB layouts, incorporating SI/PI, thermal, and mechanical constraints as defined by the engineering team.
Define and document layer stack-up, impedance requirements, and PCB fabrication specifications in coordination with PCB fab partners.
Generate, verify, and release complete fabrication and assembly output packages (Gerber/ODB++, drill files, assembly drawings, BOM), ensuring accuracy and completeness.
Skills
Strong practical skills in high-speed PCB layout, including controlled impedance routing, differential pair routing, length matching, and via management for high-frequency signals.
Good understanding of power delivery network (PDN) design principles, decoupling capacitor placement, and plane design for complex multi-power-domain boards.
Ability to read and understand hardware schematics and translate them accurately into manufacturable PCB layouts.
Knowledge of EMC/EMI design guidelines and their implementation in PCB layer stack-up definition and routing.
Strong attention to detail with a structured, quality-focused approach to layout verification, design rule check (DRC), and release processes.
Good communication and collaboration skills, with the ability to work effectively with hardware engineers, SI/PI specialists, and external PCB fabrication and assembly partners.
Ability to manage own workload and deliver layout milestones in line with project schedules.
Fluent English communication skills required; Mandarin proficiency is an advantage for coordination with local partners and teams in Taiwan.
Experience
5+ years of professional PCB layout experience, preferably in a semiconductor, server hardware, or high-speed electronics environment.
Demonstrated hands-on experience designing complex, multi-layer PCBs for high-speed digital interfaces such as PCIe, DDR4/5, USB, LPDDR, or Ethernet.
Proficiency with industry-standard PCB EDA tools, in particular Cadence Allegro PCB Designer and/or Mentor/Siemens Xpedition or PADS.
Experience applying IPC standards (IPC-2221, IPC-2222, IPC-6012) and Design for Manufacture (DFM) and Design for Assembly (DFA) guidelines throughout the layout process.
Experience working with PCB fabrication and assembly partners, including generating and reviewing fabrication, assembly, and drill output data (Gerber/ODB++).
Familiarity with PCB fab and OSAT ecosystems in Taiwan and/or Asia is strongly preferred.
Experience reviewing and implementing signal integrity and power integrity (SI/PI) guidelines provided by hardware engineers into the physical layout.
Experience with schematic capture tools (e.g., Cadence Schematic, OrCAD) and BOM management is beneficial.
Education
Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related technical field.
Additional professional training or certification in PCB design tools and methodologies (e.g., Cadence Allegro, Mentor Xpedition) is an advantage.
If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It !
Visit us at www.kandou.ai and https://www.linkedin.com/company/kandou-ai/
Skills Required
- 5+ years of professional PCB layout experience
- Hands-on experience designing complex, multi-layer PCBs for high-speed interfaces such as PCIe, DDR4/5, USB, LPDDR, or Ethernet
- Proficiency with Cadence Allegro PCB Designer and/or Mentor/Siemens Xpedition or PADS
- Experience applying IPC-2221, IPC-2222, and IPC-6012 standards
- Experience with DFM and DFA guidelines
- Experience working with PCB fabrication and assembly partners
- Experience generating and reviewing Gerber, ODB++, fabrication, assembly, and drill output data
- Experience implementing signal integrity and power integrity guidelines in physical layouts
- Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related technical field
- Fluent English communication skills
- Familiarity with PCB fabrication and OSAT ecosystems in Taiwan or Asia
- Experience with schematic capture tools such as Cadence Schematic or OrCAD and BOM management
- Mandarin proficiency
- Professional training or certification in PCB design tools and methodologies
What We Do
Kandou AI is a fabless semiconductor company developing high-speed connectivity for AI infrastructure. Its patented Copper MIMO, also known as Chord Signaling, sends correlated signals at data-processing speeds of 448 Gbps and beyond, providing an alternative to optical interconnects. The company’s technology targets AI data-movement bottlenecks and memory-wall constraints, while its platforms emphasize improved efficiency, lower power and cost, and scalability.
