Master Thesis: FPGA-Based Post-Quantum Cryptosystem Development

Join our Team
About this opportunity
Recent progress in quantum computing has raised the prospect that cryptosystems in common use today may not be secure in the future. This is because cryptography algorithms built around the difficulty of certain mathematical problems (e.g. integer factorization, discrete logarithms) offer little or no protection against a theoretical quantum computer that can solve those problems rapidly. "Harvest now, decrypt later" attacks pose a threat on longer timescales, even if practical quantum computers are not expected to exist for many years.
As a result, there is high interest in post-quantum cryptography (PQC) - the study of cryptosystems that are resistant against quantum attacks. NIST has standardized post-quantum algorithms for digital signing (ML-DSA, SLH-DSA) and key exchange (ML-KEM), with evaluation of additional signature schemes currently in progress. The EU mandates the use of PQC in the Cyber Resilience Act. Security-conscious users of information systems are increasingly demanding PQC, and it is also a highly active field of academic research.
PQC algorithms typically have greater computational complexity and larger key/signature sizes for roughly equal levels of security compared to today's classical algorithms, so there is much interest in hardware acceleration. However, because the state of PQC research is evolving rapidly, "crypto flexibility" and "crypto agility" are also highly desired properties - especially for systems that are expected to be in use for a long time, such as in infrastructure, industry, and transportation.
Thus, FPGAs are uniquely positioned as cryptosystem accelerators or hardware roots of trust. Parallelizable PQC algorithms implemented on FPGAs can execute faster and use less energy compared to software implementations. Unlike ASICs, FPGAs can be reprogrammed in the field to support new algorithms without replacing the hardware.
What you will do
The project will involve FPGA implementation of PQC elements in some capacity. Proposed projects include, but are not limited to:
A: Software/Hardware Co-Design and Analysis. Design a minimal hardware-assisted verifier for a hash-based signature scheme (e.g., ML-DSA, SLH-DSA, LMS/XMSS) to anchor secure boot of a CPU core, and study which verification sub-operations are best accelerated in the FPGA fabric versus executed in software, characterizing the resulting area, latency, and boot-time trade-offs.
B: Crypto-Agile Shared-Datapath Accelerator. Develop an accelerator that supports multiple PQC primitives by sharing expensive common building blocks (e.g., Keccak, NTT), and quantify the area savings and performance cost of resource sharing relative to dedicated cores.
The skills you bring

• Studying electrical engineering or computer science
• Experience with digital circuit design on FPGAs using a hardware description language (HDL)
• Interest in cybersecurity and the underpinning mathematical concepts
• Passion for making efficient, high-performance embedded software and digital circuits

Why join Ericsson?At Ericsson, you'll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what's possible. To build solutions never seen before to some of the world's toughest problems. You'll be challenged, but you won't be alone. You'll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next.
What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like.Encouraging a diverse and inclusive organization is core to our values at Ericsson, that's why we champion it in everything we do. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity Employer. learn more.
Primary country and city: Sweden (SE) || Lund
Req ID: 791552