At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This R&D engineer role is part of the global placement group of Cadence’s Innovus Place & Route product. This key Innovus R&D group is responsible for optimizing global placement, which decides the rough locations of the standard cells (basic circuit elements of a design). The global placement of an IC design is a critical step for various optimization objectives of a chip design, including timing (how fast a chip functions) and power (the power consumption of the chip), routing congestion (wiring of the circuits in the design with least detouring and no shorts), etc.
The Innovus product is a key product used by a variety of chip manufacturing companies such as mobile, automotive, CPU & GPU cores, & AI. The work done in this high-performance team has a huge impact on the chip industry and products that are used in our daily lives.
We are looking for talented candidates with a strong background in electronic design automation (placement background is a plus), and excellent software engineering skills, experience with multithreaded and distributed optimization. We are looking for individuals that can make the next breakthrough in the technology that we provide to the customers, making a big impact to the industry.
Minimum Qualifications:
Highly technical engineer with excellent problem solving skills
C/C++ software development experience in Linux environment
Strong understanding and extensive usage of data structures and algorithms
Great communication skills and a strong desire for working with customers
MS (Ph.D. track a plus) in Electrical Engineering, Computer Science.
Preferred:
Knowledge of physical synthesis algorithms, global placement is a strong plus.
Knowledge of analytical solver, linear, non-linear, and combinatorial optimization.
Experience in GPU programming and multithreading.
Prior R&D experience working on IC physical designs tools.
Hands on experience using the above physical design tools for design closure and knowledge of physical design flows a plus.
Experience with Tcl and other scripting languages
The annual salary range for California is $110,600 to $205,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.