The engineer will work with a global team to develop and maintain high-quality C/C++ software for hardware-software co-simulation, including compiler and runtime components for Transaction-Based Acceleration (TBA).
The role includes supporting existing features and developing new capabilities for TBA technology in next-generation Palladium and Protium emulation systems. The engineer will also work closely with field application engineers to build and deploy high-performance TBA solutions on Cadence emulation and prototyping platforms.
Position Requirements
· Bachelor’s or Master’s degree in Computer Science or a related field. Premier Institute is preferred.
· At least 5 years of software development experience in Linux and C/C++.
· Strong C/C++ programming skills with a good understanding of data structures, algorithms, and multi-threaded programming.
· Experience with System Verilog is a plus. Familiarity with UVM, SC/TLM, and debugging RTL on simulation or emulation platforms is preferred.
. Working knowledge of RTL logic synthesis is preferred.
· Strong problem-solving, written, and verbal communication skills, with attention to detail and the ability to work effectively with global teams.
. Strong debugging skill with innovative approach to reach to issue in system level environment
. For development using AI, Ability to fine tune the prompts to get the desired result and review the AI output .
We’re doing work that matters. Help us solve what others can’t.Skills Required
- Bachelor's or Master's degree in Computer Science or a related field
- At least 5 years of software development experience
- Professional experience with Linux and C/C++
- Strong C/C++ programming skills
- Understanding of data structures, algorithms, and multithreaded programming
- Strong problem-solving, written, and verbal communication skills
- Strong system-level debugging skills
- Experience with SystemVerilog
- Familiarity with UVM and SC/TLM
- Experience debugging RTL on simulation or emulation platforms
- Working knowledge of RTL logic synthesis
- Ability to fine-tune AI prompts and review AI output for development
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
