Job Title: Lead Product Engineer
Location: Bangalore
About UsCadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. This strategy is supplemented by AI-augmented development practices throughout all our organizations to empower our team to focus on creative problem-solving and innovation. Our customers are the world’s most innovative companies, delivering extraordinary electronic products—from chips to boards to systems—for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health. Join us and be part of a culture that values innovation, collaboration, and customer success.
Position Overview
Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP products. This is a tremendous opportunity to work with an experienced team focusing on development of high-performance IP related to protocols such as UCIe, PCIe, USB, DPHY and Ethernet PHYs.
The role will be a key member of technical staff in an organization responsible for IP activities including but not limited to Pre-sales engagement with potential customers, Pre-Silicon integration and Post silicon bring-up and test support for the customers. This candidate will be the primary interface between customer and CDNS R&D team. Candidate should possess strong communication skills with ability to manage multiple priorities on day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication of status, are must have attributes in this role.
Key Responsibilities
Responsible for supporting integration / customization of CDNS SERDES IP subsystems.
Analyze and resolve complex subsystem application or implementation issues and provide professional guidance to customers.
Support PHY and controller SOC integration reviews, and integration questions.
Perform RTL and gate level simulations to verify functionality.
Assist customers with gate level simulations and timing closure.
Participate in development of CDNS documentations and checklists for customers.
Support post silicon bringup and deployment activities by our customers.
Enhance customer experience by providing prompt updates to customers
AI Incorporation: Leverage AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables. Apply AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets.
Position Requirements
Experience working with UCIe, PCIe, Ethernet, 112G or similar interface IP.
Verilog RTL design and gate level verification experience.
Synthesis and STA experience, back-end experience is a plus
Familiarity with industry standard DFT flows and test methodologies.
Familiarity with package and board design.
Ability to read schematics and participate in SI/PI reviews for customer board/package implementation
Knowledge of circuits such as Phase Locked Loops, Tx and Rx Equalizers, ADC’s etc.
Familiar with concepts of Jitter, Noise, and other non-idealities in circuits
Skills & QualificationsRequired
Broad technical background with understanding of standard design flows, tools, and usage of hard and soft IPs.
Strong communication and organizational skills.
Experience with case management systems (SFDC, Jira).
Ability to prioritize cases, anticipate escalations, and manage technical reviews.
High-level understanding of technical issues; able to coordinate with subject matter experts.
Proactive in gathering feedback and driving continuous improvement.
Influential and collaborative, able to manage resources across the organization.
Skilled at listening to customer concerns and identifying potential issues.
Committed to customer satisfaction and timely case closure.
Bachelor’s in computer science or electrical engineering + 5 years of related experience, or Masters +3 years of related experience.
Preferred
Experience in memory and/or communication interface IP protocols (DDR, LPDDR, GDDR, HBM, PCIExpress, Ethernet, USB, UCIe, etc).
A general grasp of circuit architecture and design fundamentals
Understanding of Analog/Mixed signal design practices
Bachelor’s in computer science or electrical engineering + 8 years of related experience, or Masters + 5 years of related experience.
Experience with usage of AI tools in rapid prototyping and development (vibe coding) and general experience with effective AI prompting.
We’re doing work that matters. Help us solve what others can’t.
Skills Required
- Experience with UCIe, PCIe, Ethernet, 112G, or similar interface IP
- Verilog RTL design and gate-level verification experience
- Experience with synthesis and static timing analysis
- Familiarity with industry-standard DFT flows and test methodologies
- Familiarity with package and board design
- Ability to read schematics and participate in SI/PI reviews
- Knowledge of PLLs, Tx/Rx equalizers, ADCs, and related circuits
- Understanding of jitter, noise, and circuit non-idealities
- Broad understanding of standard design flows, tools, and hard and soft IP usage
- Strong communication and organizational skills
- Experience with case management systems such as Salesforce or Jira
- Ability to prioritize cases, anticipate escalations, and manage technical reviews
- Ability to coordinate with subject-matter experts and manage organizational resources
- Bachelor's degree in computer science or electrical engineering plus 5 years of related experience, or master's degree plus 3 years of related experience
- Experience with memory or communication interface IP protocols such as DDR, LPDDR, GDDR, HBM, PCIExpress, Ethernet, USB, or UCIe
- General understanding of circuit architecture and design fundamentals
- Understanding of analog and mixed-signal design practices
- Bachelor's degree in computer science or electrical engineering plus 8 years of related experience, or master's degree plus 5 years of related experience
- Experience using AI tools for rapid prototyping and development, including effective AI prompting
- Back-end experience
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
-
Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
-
Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
-
Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
